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Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at e
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space |
Date: |
Wed, 26 Aug 2015 11:59:40 -0300 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On Mon, Aug 24, 2015 at 03:56:56PM +0100, Peter Maydell wrote:
> On 24 August 2015 at 01:55, Paolo Bonzini <address@hidden> wrote:
> >
> >
> > On 21/08/2015 15:54, Eduardo Habkost wrote:
> >> > + if (tcg_enabled()) {
> >> > + memory_region_add_subregion_overlap(cpu->cpu_as_root,
> >> > + apic->apicbase &
> >> > + MSR_IA32_APICBASE_BASE,
> >> > + &apic->io_memory,
> >> > + 0x1000);
> >>
> >> Why exactly is this necessary? If this is necessary, why don't we need
> >> to do this for non-TCG accelerators?
> >
> > At least KVM and qtest do not support per-CPU address spaces.
>
> Right, but given this restriction why can't we also do whatever
> we need to work without the per-CPU address spaces with TCG?
Yeah, that was my question. I know why we can't use cpu->cpu_as_root in
KVM, but I don't understand why we need to use cpu->cpu_as_root with
TCG.
If that's really an actual per-accelerator requirement we can't avoid, I
would prefer to implement it as an AccelClass method instead of a
tcg_enabled() check.
--
Eduardo
- [Qemu-devel] [RESEND PATCH v9 0/4] remove icc bus/bridge, Zhu Guihua, 2015/08/19
- [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Zhu Guihua, 2015/08/19
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Eduardo Habkost, 2015/08/21
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Paolo Bonzini, 2015/08/24
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Peter Maydell, 2015/08/24
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space,
Eduardo Habkost <=
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Paolo Bonzini, 2015/08/26
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Eduardo Habkost, 2015/08/26
- Re: [Qemu-devel] [RESEND PATCH v9 1/4] apic: map APIC's MMIO region at each CPU's address space, Zhu Guihua, 2015/08/27
[Qemu-devel] [RESEND PATCH v9 2/4] x86: use new method to correct reset sequence, Zhu Guihua, 2015/08/19
[Qemu-devel] [RESEND PATCH v9 3/4] cpu/apic: drop icc bus/bridge, Zhu Guihua, 2015/08/19
[Qemu-devel] [RESEND PATCH v9 4/4] icc_bus: drop the unused files, Zhu Guihua, 2015/08/19