[Qemu-devel] [PULL v2] Queued TCG improvements

[Richard Henderson]

This pull includes three independent patch sets, which were
all posted during the 2.4 freeze.

The first is algorithmic improvements to tcg/optimize, both
improving its runtime and its tracking of constants.

The second is improvements to the representation of 32<->64-bit
size changing operations.  Still to do here is investigate how
these might be best applied to each tcg host.

The third is improvements to how guest unaligned accesses are
implemented in softmmu mode, for the 4 supported  host processors
that themselves implement unaligned accesses.

Change v1-v2:
  * Removed a patch that Aurelien self-nack'ed.  I guess I'd
    gotten the set of patches confused along the way.


r~


The following changes since commit 074a9925e1cfd659d5376dcaccd1436d3840e611:

  Merge remote-tracking branch 'remotes/cody/tags/block-pull-request' into 
staging (2015-08-14 16:52:34 +0100)

are available in the git repository at:

  git://github.com/rth7680/qemu.git tags/pull-tcg-20150818

for you to fetch changes up to 2e58c34d4c9c61f311b5468f05b0ad63b77645c1:

  tcg/aarch64: Use softmmu fast path for unaligned accesses (2015-08-18 
07:50:19 -0700)

----------------------------------------------------------------
queued tcg patches

----------------------------------------------------------------
Aurelien Jarno (11):
      tcg/optimize: fix constant signedness
      tcg/optimize: optimize temps tracking
      tcg/optimize: add temp_is_const and temp_is_copy functions
      tcg/optimize: track const/copy status separately
      tcg/optimize: allow constant to have copies
      tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
      tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32
      tcg: implement real ext_i32_i64 and extu_i32_i64 ops
      tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops
      tcg: update README about size changing ops
      tcg/i386: use softmmu fast path for unaligned accesses

Benjamin Herrenschmidt (1):
      tcg/ppc: Improve unaligned load/store handling on 64-bit backend

Richard Henderson (4):
      tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
      tcg: Remove tcg_gen_trunc_i64_i32
      tcg/s390: Use softmmu fast path for unaligned accesses
      tcg/aarch64: Use softmmu fast path for unaligned accesses

 target-alpha/translate.c      |   4 +-
 target-arm/translate-a64.c    |  60 +++++------
 target-arm/translate.c        |  46 ++++----
 target-cris/translate.c       |   4 +-
 target-m68k/translate.c       |   2 +-
 target-microblaze/translate.c |   8 +-
 target-mips/translate.c       |   4 +-
 target-openrisc/translate.c   |  22 ++--
 target-s390x/translate.c      |  30 +++---
 target-sh4/translate.c        |   4 +-
 target-sparc/translate.c      |  14 +--
 target-tricore/translate.c    |  32 +++---
 target-xtensa/translate.c     |   2 +-
 tcg/README                    |  32 ++++--
 tcg/aarch64/tcg-target.c      |  41 ++++---
 tcg/aarch64/tcg-target.h      |   3 +-
 tcg/i386/tcg-target.c         |  27 +++--
 tcg/i386/tcg-target.h         |   3 +-
 tcg/ia64/tcg-target.c         |   4 +
 tcg/ia64/tcg-target.h         |   3 +-
 tcg/optimize.c                | 246 +++++++++++++++++++++---------------------
 tcg/ppc/tcg-target.c          |  47 ++++++--
 tcg/ppc/tcg-target.h          |   3 +-
 tcg/s390/tcg-target.c         |  31 +++++-
 tcg/s390/tcg-target.h         |   3 +-
 tcg/sparc/tcg-target.c        |  22 ++--
 tcg/sparc/tcg-target.h        |   3 +-
 tcg/tcg-op.c                  |  48 ++++-----
 tcg/tcg-op.h                  |  12 +--
 tcg/tcg-opc.h                 |  10 +-
 tcg/tcg.h                     |   3 +-
 tcg/tci/tcg-target.c          |   4 +
 tcg/tci/tcg-target.h          |   3 +-
 tci.c                         |   6 +-
 34 files changed, 447 insertions(+), 339 deletions(-)