[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 12/14] target-i386: Implement BNDLDX, BNDSTX
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 12/14] target-i386: Implement BNDLDX, BNDSTX |
Date: |
Thu, 9 Jul 2015 09:17:27 +0100 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/helper.h | 4 +++
target-i386/mpx_helper.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++
target-i386/translate.c | 61 +++++++++++++++++++++++++++++++
3 files changed, 158 insertions(+)
diff --git a/target-i386/helper.h b/target-i386/helper.h
index 331457f..48c2e23 100644
--- a/target-i386/helper.h
+++ b/target-i386/helper.h
@@ -17,6 +17,10 @@ DEF_HELPER_2(idivq_EAX, void, env, tl)
#endif
DEF_HELPER_FLAGS_2(bndck, TCG_CALL_NO_WG, void, env, i32)
+DEF_HELPER_FLAGS_3(bndldx32, TCG_CALL_NO_WG, i64, env, tl, tl)
+DEF_HELPER_FLAGS_3(bndldx64, TCG_CALL_NO_WG, i64, env, tl, tl)
+DEF_HELPER_FLAGS_5(bndstx32, TCG_CALL_NO_WG, void, env, tl, tl, i64, i64)
+DEF_HELPER_FLAGS_5(bndstx64, TCG_CALL_NO_WG, void, env, tl, tl, i64, i64)
DEF_HELPER_2(aam, void, env, int)
DEF_HELPER_2(aad, void, env, int)
diff --git a/target-i386/mpx_helper.c b/target-i386/mpx_helper.c
index 172a4d2..0ac40bd 100644
--- a/target-i386/mpx_helper.c
+++ b/target-i386/mpx_helper.c
@@ -57,3 +57,96 @@ void helper_bndck(CPUX86State *env, uint32_t fail)
raise_exception(env, EXCP05_BOUND);
}
}
+
+static uint64_t lookup_bte64(CPUX86State *env, uint64_t base)
+{
+ uint64_t bndcsr, bde, bt;
+
+ if ((env->hflags & HF_CPL_MASK) == 3) {
+ bndcsr = env->bndcs_regs.cfgu;
+ } else {
+ bndcsr = env->msr_bndcfgs;
+ }
+
+ bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12);
+ bt = cpu_ldq_data(env, bde);
+ if ((bt & 1) == 0) {
+ env->bndcs_regs.sts = bde | 2;
+ raise_exception(env, EXCP05_BOUND);
+ }
+
+ return (extract64(base, 3, 17) << 5) + (bt & ~7);
+}
+
+static uint32_t lookup_bte32(CPUX86State *env, uint32_t base)
+{
+ uint32_t bndcsr, bde, bt;
+
+ if ((env->hflags & HF_CPL_MASK) == 3) {
+ bndcsr = env->bndcs_regs.cfgu;
+ } else {
+ bndcsr = env->msr_bndcfgs;
+ }
+
+ bde = (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK);
+ bt = cpu_ldl_data(env, bde);
+ if ((bt & 1) == 0) {
+ env->bndcs_regs.sts = bde | 2;
+ raise_exception(env, EXCP05_BOUND);
+ }
+
+ return (extract32(base, 2, 10) << 4) + (bt & ~3);
+}
+
+uint64_t helper_bndldx64(CPUX86State *env, target_ulong base, target_ulong ptr)
+{
+ uint64_t bte, lb, ub, pt;
+
+ bte = lookup_bte64(env, base);
+ lb = cpu_ldq_data(env, bte);
+ ub = cpu_ldq_data(env, bte + 8);
+ pt = cpu_ldq_data(env, bte + 16);
+
+ if (pt != ptr) {
+ lb = ub = 0;
+ }
+ env->mmx_t0.q = ub;
+ return lb;
+}
+
+uint64_t helper_bndldx32(CPUX86State *env, target_ulong base, target_ulong ptr)
+{
+ uint32_t bte, lb, ub, pt;
+
+ bte = lookup_bte32(env, base);
+ lb = cpu_ldl_data(env, bte);
+ ub = cpu_ldl_data(env, bte + 4);
+ pt = cpu_ldl_data(env, bte + 8);
+
+ if (pt != ptr) {
+ lb = ub = 0;
+ }
+ return ((uint64_t)ub << 32) | lb;
+}
+
+void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr,
+ uint64_t lb, uint64_t ub)
+{
+ uint64_t bte;
+
+ bte = lookup_bte64(env, base);
+ cpu_stq_data(env, bte, lb);
+ cpu_stq_data(env, bte + 8, ub);
+ cpu_stq_data(env, bte + 16, ptr);
+}
+
+void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr,
+ uint64_t lb, uint64_t ub)
+{
+ uint32_t bte;
+
+ bte = lookup_bte32(env, base);
+ cpu_stl_data(env, bte, lb);
+ cpu_stl_data(env, bte + 4, ub);
+ cpu_stl_data(env, bte + 8, ptr);
+}
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 05796cc..7892951 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7589,6 +7589,38 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
/* bnd registers are now in-use */
gen_set_hflag(s, HF_MPX_IU_MASK);
}
+ } else if (mod != 3) {
+ /* bndldx */
+ AddressParts a = gen_lea_modrm_0(env, s, modrm);
+ if (reg >= 4
+ || (prefixes & PREFIX_LOCK)
+ || s->aflag == MO_16
+ || a.base < -1) {
+ goto illegal_op;
+ }
+ if (a.base >= 0) {
+ tcg_gen_addi_tl(cpu_A0, cpu_regs[a.base], a.disp);
+ } else {
+ tcg_gen_movi_tl(cpu_A0, 0);
+ }
+ gen_lea_v_seg(s, s->aflag, cpu_A0, a.def_seg, s->override);
+ if (a.index >= 0) {
+ tcg_gen_mov_tl(cpu_T0, cpu_regs[a.index]);
+ } else {
+ tcg_gen_movi_tl(cpu_T0, 0);
+ }
+ gen_update_cc_op(s);
+ gen_jmp_im(pc_start - s->cs_base);
+ if (CODE64(s)) {
+ gen_helper_bndldx64(cpu_bndl[reg], cpu_env, cpu_A0,
cpu_T0);
+ tcg_gen_ld_i64(cpu_bndu[reg], cpu_env,
+ offsetof(CPUX86State, mmx_t0.q));
+ } else {
+ gen_helper_bndldx32(cpu_bndu[reg], cpu_env, cpu_A0,
cpu_T0);
+ tcg_gen_ext32u_i64(cpu_bndl[reg], cpu_bndu[reg]);
+ tcg_gen_shri_i64(cpu_bndu[reg], cpu_bndu[reg], 32);
+ }
+ gen_set_hflag(s, HF_MPX_IU_MASK);
}
}
gen_nop_modrm(env, s, modrm);
@@ -7661,6 +7693,35 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
s->mem_index, MO_LEUL);
}
}
+ } else if (mod != 3) {
+ /* bndstx */
+ AddressParts a = gen_lea_modrm_0(env, s, modrm);
+ if (reg >= 4
+ || (prefixes & PREFIX_LOCK)
+ || s->aflag == MO_16
+ || a.base < -1) {
+ goto illegal_op;
+ }
+ if (a.base >= 0) {
+ tcg_gen_addi_tl(cpu_A0, cpu_regs[a.base], a.disp);
+ } else {
+ tcg_gen_movi_tl(cpu_A0, 0);
+ }
+ gen_lea_v_seg(s, s->aflag, cpu_A0, a.def_seg, s->override);
+ if (a.index >= 0) {
+ tcg_gen_mov_tl(cpu_T0, cpu_regs[a.index]);
+ } else {
+ tcg_gen_movi_tl(cpu_T0, 0);
+ }
+ gen_update_cc_op(s);
+ gen_jmp_im(pc_start - s->cs_base);
+ if (CODE64(s)) {
+ gen_helper_bndstx64(cpu_env, cpu_A0, cpu_T0,
+ cpu_bndl[reg], cpu_bndu[reg]);
+ } else {
+ gen_helper_bndstx32(cpu_env, cpu_A0, cpu_T0,
+ cpu_bndl[reg], cpu_bndu[reg]);
+ }
}
}
gen_nop_modrm(env, s, modrm);
--
2.4.3
- Re: [Qemu-devel] [PATCH 04/14] target-i386: Implement XSAVEOPT, (continued)
- [Qemu-devel] [PATCH 05/14] target-i386: Enable control registers for MPX, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 06/14] target-i386: Perform set/reset_inhibit_irq inline, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 07/14] target-i386: Split up gen_lea_modrm, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 08/14] target-i386: Implement BNDMK, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 09/14] target-i386: Implement BNDMOV, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 11/14] target-i386: Update BNDSTATUS for exceptions raised by BOUND, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 12/14] target-i386: Implement BNDLDX, BNDSTX,
Richard Henderson <=
- [Qemu-devel] [PATCH 10/14] target-i386: Implement BNDCL, BNDCU, BNDCN, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 13/14] target-i386: Clear bndregs during legacy near jumps, Richard Henderson, 2015/07/09
- [Qemu-devel] [PATCH 14/14] target-i386: Enable XCR0 features for user-mode, Richard Henderson, 2015/07/09