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Re: [Qemu-devel] [PULL 00/28] target-arm queue


From: Peter Maydell
Subject: Re: [Qemu-devel] [PULL 00/28] target-arm queue
Date: Tue, 16 Jun 2015 09:06:21 +0100

On 15 June 2015 at 18:24, Peter Maydell <address@hidden> wrote:
> Mishmash of target-arm stuff; nothing earth-shaking.
>
> -- PMM
>
>
> The following changes since commit b500e4db8e3e0b5f41a2dd14e2001200e5fc7d6b:
>
>   Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20150615-1' 
> into staging (2015-06-15 16:15:32 +0100)
>
> are available in the git repository at:
>
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20150615
>
> for you to fetch changes up to f264d51d8ad939d7fb339d61a8cf680ed0cb21a2:
>
>   hw/arm/virt-acpi-build: Add SPCR table (2015-06-15 18:06:11 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * Handle "extended small page" descriptors correctly
>  * Use extended address bits from supersection short descriptors
>  * Update interrupt status for all cores in gic_update
>  * Fix off-by-one in exynos4210_fimd bit-swap code
>  * Remove stray unused 'pending_exception' field
>  * Add Cortex-A53 KVM support
>  * Fix reset value of REVIDR
>  * Add AArch32 MIDR aliases for ARMv8 cores
>  * MAINTAINERS update for ARM ACPI code
>  * Trust the kernel's value of MPIDR if we're using KVM
>  * Various pxa2xx device updates to avoid old APIs
>  * Mark pxa2xx copro registers as ARM_CP_IO so -icount works
>  * Correctly UNDEF Thumb2 DSP insns on Cortex-M3
>  * Initial work towards implementing PMSAv7
>  * Fix a reset order bug introduced recently
>  * Correct "preferred return address" for cpreg access exceptions
>  * Add ACPI SPCR table for the virt board
>

Applied, thanks.

-- PMM



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