[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 0/3] target-alpha PALcode improvements
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH 0/3] target-alpha PALcode improvements |
Date: |
Sat, 13 Jun 2015 00:12:47 +0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-06-09 14:13, Richard Henderson wrote:
> Rather than copying around a block of 8 registers when we swap modes,
> let the translator map code generated for PALmode to the shadow regs
> directly. This simplifies PALmode entry and exit sufficiently to
> allow these insns to be performed inline.
>
> Sadly, the speedup for this is in the noise. But I still think it
> makes sense.
That's usually the case nowadays. It seems all TCG related part are
already well optimized, and that most targets are now limited by the MMU
emulation. That said I agree it makes sense, and also makes the code
cleaner (even if bigger).
>
> r~
>
>
> Richard Henderson (3):
> target-alpha: Use separate TCGv temporaries for the shadow registers
> target-alpha: Inline call_pal
> target-alpha: Inline hw_ret
>
> target-alpha/cpu.h | 3 +-
> target-alpha/gdbstub.c | 4 +-
> target-alpha/helper.c | 63 ++++++---------
> target-alpha/helper.h | 3 -
> target-alpha/machine.c | 4 +-
> target-alpha/sys_helper.c | 22 -----
> target-alpha/translate.c | 201
> ++++++++++++++++++++++++++++++----------------
> 7 files changed, 166 insertions(+), 134 deletions(-)
The whole series is:
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net