[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH] microblaze: Remove uses of TCGv and target_ulon
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH] microblaze: Remove uses of TCGv and target_ulong |
Date: |
Fri, 15 May 2015 10:17:32 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
On 05/15/2015 09:48 AM, Peter Crosthwaite wrote:
> On Fri, May 15, 2015 at 8:41 AM, Richard Henderson <address@hidden> wrote:
>> On 05/14/2015 09:49 PM, Peter Crosthwaite wrote:
>>> To prepare support for conversion of Microblaze TARGET_LONG to 64 bits.
>>> This in turn will then allow support for multi-arch QEMU including both
>>> Microblaze and 64-bit CPU targets (notably AArch64).
>>
>> I don't understand why multi-arch requires all of the arches
>> to have the same width. This seems like a major failure to me.
>>
>> I'm not particularly keen on this at all.
>>
>
> What is the alternative? What is the def of the global symbols TCGv
> and TARGET_LONG in the multi-arch cases?
Different for every file? Not relevant for "multi-arch" itself?
I dunno. Where does stuff break down first?
I would expect 80% of it to be private to target-foo, and /mostly/ encapsulated
in the tcg ops that are produced.
I realize there's a problem of how addresses are treated inside the tcg
backend, but that should be surmountable. Perhaps all we need are 4 new
opcodes so that both 32-bit and 64-bit addresses can be represented within the
opcode stream simultaneously.
I assume we're not still talking about multi-arch linux-user, but are really
only talking about softmmu here...
r~