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[Qemu-devel] [PATCH 30/31] ich9: add smm_enabled field and arguments
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 30/31] ich9: add smm_enabled field and arguments |
Date: |
Mon, 11 May 2015 15:49:16 +0200 |
Q35's ACPI device is hard-coding SMM availability to KVM. Place the
logic where the board is created instead, so that it will be possible
to override it.
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/acpi/ich9.c | 5 +++--
hw/i386/pc_q35.c | 2 +-
hw/isa/lpc_ich9.c | 4 ++--
include/hw/acpi/ich9.h | 3 ++-
include/hw/i386/ich9.h | 2 +-
5 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index e6eae8c..86deb2b 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -194,7 +194,7 @@ static void pm_reset(void *opaque)
acpi_pm_tmr_reset(&pm->acpi_regs);
acpi_gpe_reset(&pm->acpi_regs);
- if (kvm_enabled()) {
+ if (!pm->smm_enabled) {
/* Mark SMM as already inited to prevent SMM from running. KVM does not
* support SMM mode. */
pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
@@ -211,7 +211,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
acpi_pm1_evt_power_down(&pm->acpi_regs);
}
-void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
+void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, bool smm_enabled,
qemu_irq sci_irq)
{
memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
@@ -233,6 +233,7 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
"acpi-smi", 8);
memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
+ pm->smm_enabled = smm_enabled;
pm->irq = sci_irq;
qemu_register_reset(pm_reset, pm);
pm->powerdown_notifier.notify = pm_powerdown_req;
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index e67f2de..ad8bb2a 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -254,7 +254,7 @@ static void pc_q35_init(MachineState *machine)
(pc_machine->vmport != ON_OFF_AUTO_ON), 0xff0104);
/* connect pm stuff to lpc */
- ich9_lpc_pm_init(lpc);
+ ich9_lpc_pm_init(lpc, kvm_enabled());
/* ahci and SATA device, for q35 1 ahci controller is built-in */
ahci = pci_create_simple_multifunction(host_bus,
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 0269cfe..ac0e63e 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -357,13 +357,13 @@ static void ich9_set_sci(void *opaque, int irq_num, int
level)
}
}
-void ich9_lpc_pm_init(PCIDevice *lpc_pci)
+void ich9_lpc_pm_init(PCIDevice *lpc_pci, bool smm_enabled)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci);
qemu_irq *sci_irq;
sci_irq = qemu_allocate_irqs(ich9_set_sci, lpc, 1);
- ich9_pm_init(lpc_pci, &lpc->pm, sci_irq[0]);
+ ich9_pm_init(lpc_pci, &lpc->pm, smm_enabled, sci_irq[0]);
ich9_lpc_reset(&lpc->d.qdev);
}
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 77cc65c..ac24bbe 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -54,10 +54,11 @@ typedef struct ICH9LPCPMRegs {
uint8_t disable_s3;
uint8_t disable_s4;
uint8_t s4_val;
+ uint8_t smm_enabled;
} ICH9LPCPMRegs;
void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
- qemu_irq sci_irq);
+ bool smm_enabled, qemu_irq sci_irq);
void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
extern const VMStateDescription vmstate_ich9_pm;
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index a2cc15c..b317a48 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -17,7 +17,7 @@
void ich9_lpc_set_irq(void *opaque, int irq_num, int level);
int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin);
-void ich9_lpc_pm_init(PCIDevice *pci_lpc);
+void ich9_lpc_pm_init(PCIDevice *pci_lpc, bool smm_enabled);
I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
#define ICH9_CC_SIZE (16 * 1024) /* 16KB */
--
1.8.3.1
- Re: [Qemu-devel] [PATCH 23/31] ich9: implement SMI_LOCK, (continued)
- [Qemu-devel] [PATCH 24/31] hw/acpi: acpi_pm1_cnt_init(): take "disable_s3" and "disable_s4", Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 25/31] hw/acpi: move "etc/system-states" fw_cfg file from PIIX4 to core, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 26/31] hw/acpi: piix4_pm_init(): take fw_cfg object no more, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 28/31] vga: disable chain4_alias if KVM supports SMRAM, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 29/31] pc_piix: rename kvm_enabled to smm_enabled, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 27/31] target-i386: add support for SMBASE MSR and SMIs, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 31/31] pc: add SMM property, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 30/31] ich9: add smm_enabled field and arguments,
Paolo Bonzini <=
- Message not available
- Re: [Qemu-devel] [PATCH 00/31] target-i386: SMM improvements and partial support under KVM, Michael S. Tsirkin, 2015/05/31