[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 19/31] q35: add config space wmask for SMRAM and ESM
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 19/31] q35: add config space wmask for SMRAM and ESMRAMC |
Date: |
Mon, 11 May 2015 15:49:05 +0200 |
From: Gerd Hoffmann <address@hidden>
Signed-off-by: Gerd Hoffmann <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/pci-host/q35.c | 2 ++
include/hw/pci-host/q35.h | 9 +++++++++
2 files changed, 11 insertions(+)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 8471d7a..df0032e 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -352,6 +352,8 @@ static void mch_reset(DeviceState *qdev)
d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT;
d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT;
+ d->wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK;
+ d->wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK;
mch_update(mch);
}
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index d3c7bbb..01b8492 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -140,6 +140,11 @@ typedef struct Q35PCIHost {
#define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END 0x100000
#define MCH_HOST_BRIDGE_SMRAM_DEFAULT \
MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG
+#define MCH_HOST_BRIDGE_SMRAM_WMASK \
+ (MCH_HOST_BRIDGE_SMRAM_D_OPEN | \
+ MCH_HOST_BRIDGE_SMRAM_D_CLS | \
+ MCH_HOST_BRIDGE_SMRAM_D_LCK | \
+ MCH_HOST_BRIDGE_SMRAM_G_SMRAME)
#define MCH_HOST_BRIDGE_ESMRAMC 0x9e
#define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 7))
@@ -156,6 +161,10 @@ typedef struct Q35PCIHost {
(MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE | \
MCH_HOST_BRIDGE_ESMRAMC_SM_L1 | \
MCH_HOST_BRIDGE_ESMRAMC_SM_L2)
+#define MCH_HOST_BRIDGE_ESMRAMC_WMASK \
+ (MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME | \
+ MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK | \
+ MCH_HOST_BRIDGE_ESMRAMC_T_EN)
/* D1:F0 PCIE* port*/
#define MCH_PCIE_DEV 1
--
1.8.3.1
- [Qemu-devel] [PATCH 12/31] vl: run "late" notifiers immediately, (continued)
- [Qemu-devel] [PATCH 12/31] vl: run "late" notifiers immediately, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 13/31] target-i386: create a separate AddressSpace for each CPU, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 11/31] qom: add object_property_add_const_link, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 14/31] hw/i386: add a separate region that tracks the SMRAME bit, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 15/31] target-i386: use memory API to implement SMRAM, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 16/31] hw/i386: remove smram_update, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 17/31] q35: implement high SMRAM, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 18/31] q35: fix ESMRAMC default, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 19/31] q35: add config space wmask for SMRAM and ESMRAMC,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 22/31] q35: implement TSEG, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 21/31] q35: add test for SMRAM.D_LCK, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 23/31] ich9: implement SMI_LOCK, Paolo Bonzini, 2015/05/11
- Re: [Qemu-devel] [PATCH 23/31] ich9: implement SMI_LOCK, Gerd Hoffmann, 2015/05/12
[Qemu-devel] [PATCH 24/31] hw/acpi: acpi_pm1_cnt_init(): take "disable_s3" and "disable_s4", Paolo Bonzini, 2015/05/11