[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 08/31] pflash_cfi01: change to new-style MMIO access
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 08/31] pflash_cfi01: change to new-style MMIO accessors |
Date: |
Mon, 11 May 2015 15:48:54 +0200 |
This is a required step to implement read_with_attrs and write_with_attrs.
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/block/pflash_cfi01.c | 96 ++++++-------------------------------------------
1 file changed, 10 insertions(+), 86 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 7507a15..0b3667a 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -650,101 +650,25 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
}
-static uint32_t pflash_readb_be(void *opaque, hwaddr addr)
-{
- return pflash_read(opaque, addr, 1, 1);
-}
-
-static uint32_t pflash_readb_le(void *opaque, hwaddr addr)
-{
- return pflash_read(opaque, addr, 1, 0);
-}
-
-static uint32_t pflash_readw_be(void *opaque, hwaddr addr)
+static uint64_t pflash_mem_read(void *opaque, hwaddr addr, unsigned len)
{
pflash_t *pfl = opaque;
+ bool be = !!(pfl->features & (1 << PFLASH_BE));
- return pflash_read(pfl, addr, 2, 1);
+ return pflash_read(pfl, addr, len, be);
}
-static uint32_t pflash_readw_le(void *opaque, hwaddr addr)
+static void pflash_mem_write(void *opaque, hwaddr addr, uint64_t value,
unsigned len)
{
pflash_t *pfl = opaque;
+ bool be = !!(pfl->features & (1 << PFLASH_BE));
- return pflash_read(pfl, addr, 2, 0);
+ pflash_write(pfl, addr, value, len, be);
}
-static uint32_t pflash_readl_be(void *opaque, hwaddr addr)
-{
- pflash_t *pfl = opaque;
-
- return pflash_read(pfl, addr, 4, 1);
-}
-
-static uint32_t pflash_readl_le(void *opaque, hwaddr addr)
-{
- pflash_t *pfl = opaque;
-
- return pflash_read(pfl, addr, 4, 0);
-}
-
-static void pflash_writeb_be(void *opaque, hwaddr addr,
- uint32_t value)
-{
- pflash_write(opaque, addr, value, 1, 1);
-}
-
-static void pflash_writeb_le(void *opaque, hwaddr addr,
- uint32_t value)
-{
- pflash_write(opaque, addr, value, 1, 0);
-}
-
-static void pflash_writew_be(void *opaque, hwaddr addr,
- uint32_t value)
-{
- pflash_t *pfl = opaque;
-
- pflash_write(pfl, addr, value, 2, 1);
-}
-
-static void pflash_writew_le(void *opaque, hwaddr addr,
- uint32_t value)
-{
- pflash_t *pfl = opaque;
-
- pflash_write(pfl, addr, value, 2, 0);
-}
-
-static void pflash_writel_be(void *opaque, hwaddr addr,
- uint32_t value)
-{
- pflash_t *pfl = opaque;
-
- pflash_write(pfl, addr, value, 4, 1);
-}
-
-static void pflash_writel_le(void *opaque, hwaddr addr,
- uint32_t value)
-{
- pflash_t *pfl = opaque;
-
- pflash_write(pfl, addr, value, 4, 0);
-}
-
-static const MemoryRegionOps pflash_cfi01_ops_be = {
- .old_mmio = {
- .read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, },
- .write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, },
- },
- .endianness = DEVICE_NATIVE_ENDIAN,
-};
-
-static const MemoryRegionOps pflash_cfi01_ops_le = {
- .old_mmio = {
- .read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, },
- .write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, },
- },
+static const MemoryRegionOps pflash_cfi01_ops = {
+ .read = pflash_mem_read,
+ .write = pflash_mem_write,
.endianness = DEVICE_NATIVE_ENDIAN,
};
@@ -775,7 +699,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error
**errp)
memory_region_init_rom_device(
&pfl->mem, OBJECT(dev),
- pfl->features & (1 << PFLASH_BE) ? &pflash_cfi01_ops_be :
&pflash_cfi01_ops_le,
+ &pflash_cfi01_ops,
pfl,
pfl->name, total_len, &local_err);
if (local_err) {
--
1.8.3.1
- [Qemu-devel] [PATCH 00/31] target-i386: SMM improvements and partial support under KVM, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 01/31] pc: add 2.4 machine types, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 02/31] target-i386: introduce cpu_get_mem_attrs, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 05/31] target-i386: mask NMIs on entry to SMM, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 06/31] target-i386: set G=1 in SMM big real mode selectors, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 07/31] pflash_cfi01: change big-endian property to BIT type, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 04/31] target-i386: Use correct memory attributes for ioport accesses, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 08/31] pflash_cfi01: change to new-style MMIO accessors,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 03/31] target-i386: Use correct memory attributes for memory accesses, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 10/31] vl: allow full-blown QemuOpts syntax for -global, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 09/31] pflash_cfi01: add secure property, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 12/31] vl: run "late" notifiers immediately, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 13/31] target-i386: create a separate AddressSpace for each CPU, Paolo Bonzini, 2015/05/11
- [Qemu-devel] [PATCH 11/31] qom: add object_property_add_const_link, Paolo Bonzini, 2015/05/11