Re: [Qemu-devel] [PATCH v1 2/7] STM32F2xx: Display PWM duty cycle from timer

[Alistair Francis]

On Sun, Apr 26, 2015 at 4:35 AM, Peter Crosthwaite
<address@hidden> wrote:
> On Sat, Apr 25, 2015 at 1:18 AM, Alistair Francis <address@hidden> wrote:
>> If correctly configured allow the STM32F2xx timer to print
>> out the PWM duty cycle information.
>>
>> Signed-off-by: Alistair Francis <address@hidden>
>> ---
>>
>>  hw/timer/stm32f2xx_timer.c | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c
>> index ecadf9d..6f463e8 100644
>> --- a/hw/timer/stm32f2xx_timer.c
>> +++ b/hw/timer/stm32f2xx_timer.c
>> @@ -49,6 +49,16 @@ static void stm32f2xx_timer_interrupt(void *opaque)
>>          qemu_irq_pulse(s->irq);
>>          stm32f2xx_timer_set_alarm(s, s->hit_time);
>>      }
>> +
>> +    if (s->tim_ccmr1 & (TIM_CCMR1_OC2M2 + TIM_CCMR1_OC2M1) &&
>> +        !(s->tim_ccmr1 & TIM_CCMR1_OC2M0) &&
>> +        (s->tim_ccmr1 & TIM_CCMR1_OC2PE) &&
>
> Bracing looks inconsistent. Can you drop this set of () to make it
> consistent with one below?

Good catch, I'll remove the braces.

>
>> +        s->tim_ccer & TIM_CCER_CC2E) {
>> +        /* PWM 2 - Mode 1 */
>> +        DB_PRINT("Duty Cycle: %d%%\n",
>> +                s->tim_ccr2 / (100 * (s->tim_psc + 1)));
>> +        stm32f2xx_timer_set_alarm(s, s->hit_time);
>
> This looks like a functional change - why do you need to set the alarm
> for PWM? Commit messages suggests this is supposed to just add debug
> printfs.

You're right, this shouldn't be required. It must have been left over
from testing. I will remove.

Thanks,

Alistair

>
> Regards,
> Peter
>
>> +    }
>>  }
>>
>>  static inline int64_t stm32f2xx_ns_to_ticks(STM32F2XXTimerState *s, int64_t 
>> t)
>> --
>> 2.1.4
>>
>>