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Re: [Qemu-devel] [PATCH 3/6] q35: implement SMRAM.D_LCK
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-devel] [PATCH 3/6] q35: implement SMRAM.D_LCK |
Date: |
Mon, 20 Apr 2015 14:06:37 +0200 |
On Mon, Apr 20, 2015 at 11:19:17AM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
> ---
> hw/pci-host/q35.c | 8 +++++++-
> include/hw/pci-host/q35.h | 3 +++
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 7093cc3..f0d840c 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -268,6 +268,13 @@ static void mch_update_smram(MCHPCIState *mch)
> PCIDevice *pd = PCI_DEVICE(mch);
> bool h_smrame = (pd->config[MCH_HOST_BRIDGE_ESMRAMC] &
> MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME);
>
> + /* implement SMRAM.D_LCK */
> + if (pd->config[MCH_HOST_BRIDGE_SMRAM] & MCH_HOST_BRIDGE_SMRAM_D_LCK) {
> + pd->config[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_D_OPEN;
> + pd->wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK_LCK;
> + pd->wmask[MCH_HOST_BRIDGE_ESMRAMC] =
> MCH_HOST_BRIDGE_ESMRAMC_WMASK_LCK;
> + }
> +
> memory_region_transaction_begin();
>
> if (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_D_OPEN) {
> @@ -297,7 +304,6 @@ static void mch_write_config(PCIDevice *d,
> {
> MCHPCIState *mch = MCH_PCI_DEVICE(d);
>
> - /* XXX: implement SMRAM.D_LOCK */
> pci_default_write_config(d, address, val, len);
>
> if (ranges_overlap(address, len, MCH_HOST_BRIDGE_PAM0,
> diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
> index 82452c5..61bfe7e 100644
> --- a/include/hw/pci-host/q35.h
> +++ b/include/hw/pci-host/q35.h
> @@ -146,6 +146,8 @@ typedef struct Q35PCIHost {
> MCH_HOST_BRIDGE_SMRAM_D_CLS | \
> MCH_HOST_BRIDGE_SMRAM_D_LCK | \
> MCH_HOST_BRIDGE_SMRAM_G_SMRAME)
> +#define MCH_HOST_BRIDGE_SMRAM_WMASK_LCK \
> + MCH_HOST_BRIDGE_SMRAM_D_CLS
>
> #define MCH_HOST_BRIDGE_ESMRAMC 0x9e
> #define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 7))
> @@ -166,6 +168,7 @@ typedef struct Q35PCIHost {
> (MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME | \
> MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK | \
> MCH_HOST_BRIDGE_ESMRAMC_T_EN)
> +#define MCH_HOST_BRIDGE_ESMRAMC_WMASK_LCK 0
>
> /* D1:F0 PCIE* port*/
> #define MCH_PCIE_DEV 1
> --
> 1.8.3.1
- [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 2/6] add SMRAM+ESMRAMC wmask, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 5/6] [wip] tseg, part1, not (yet) tested, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 6/6] [wip] tseg, part2, not (yet) tested, Gerd Hoffmann, 2015/04/20
- [Qemu-devel] [PATCH 3/6] q35: implement SMRAM.D_LCK, Gerd Hoffmann, 2015/04/20
- Re: [Qemu-devel] [PATCH 3/6] q35: implement SMRAM.D_LCK,
Michael S. Tsirkin <=
- [Qemu-devel] [PATCH 4/6] q35: add test for SMRAM.D_LCK, Gerd Hoffmann, 2015/04/20
- Re: [Qemu-devel] [PATCH 1/6] [fixup] add ESMRAMC default, Michael S. Tsirkin, 2015/04/20