[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v4 04/20] hw/acpi/aml-build: Add aml_memory32_fi
From: |
Igor Mammedov |
Subject: |
Re: [Qemu-devel] [PATCH v4 04/20] hw/acpi/aml-build: Add aml_memory32_fixed() term |
Date: |
Thu, 9 Apr 2015 14:42:21 +0200 |
On Fri, 3 Apr 2015 18:03:36 +0800
Shannon Zhao <address@hidden> wrote:
> From: Shannon Zhao <address@hidden>
>
> Add aml_memory32_fixed() for describing device mmio region in resource
> template.
> These can be used to generating DSDT table for ACPI on ARM.
>
> Signed-off-by: Shannon Zhao <address@hidden>
> Signed-off-by: Shannon Zhao <address@hidden>
> ---
> hw/acpi/aml-build.c | 22 ++++++++++++++++++++++
> include/hw/acpi/aml-build.h | 1 +
> 2 files changed, 23 insertions(+)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 8d01959..fefe7c7 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -505,6 +505,28 @@ Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2,
> Aml *arg3, Aml *arg4)
> return var;
> }
>
> +/*
> + * ACPI 1.0: 6.4.3.4 Memory32Fixed (Memory Resource Descriptor Macro)
> + */
> +Aml *aml_memory32_fixed(uint64_t addr, uint64_t size, uint8_t rw_flag)
perhaps
s/uint64_t/uint32_t/
don't use uintXX for bitfields if could be helped.
Probably in this case existing AmlReadAndWrite enum should be used.
> +{
> + Aml *var = aml_alloc();
> + build_append_byte(var->buf, 0x86); /* Memory32Fixed Resource Descriptor
> */
> + build_append_byte(var->buf, 9); /* Length, bits[7:0] value = 9 */
> + build_append_byte(var->buf, 0); /* Length, bits[15:8] value = 0 */
> + build_append_byte(var->buf, rw_flag); /* Write status, 1 rw 0 ro */
> + build_append_byte(var->buf, addr & 0xff); /* Range base address
> bits[7:0] */
> + build_append_byte(var->buf, (addr >> 8) & 0xff); /* Range base address
> bits[15:8] */
> + build_append_byte(var->buf, (addr >> 16) & 0xff); /* Range base address
> bits[23:16] */
> + build_append_byte(var->buf, (addr >> 24) & 0xff); /* Range base address
> bits[31:24] */
> +
> + build_append_byte(var->buf, size & 0xff); /* Range length bits[7:0] */
> + build_append_byte(var->buf, (size >> 8) & 0xff); /* Range length
> bits[15:8] */
> + build_append_byte(var->buf, (size >> 16) & 0xff); /* Range length
> bits[23:16] */
> + build_append_byte(var->buf, (size >> 24) & 0xff); /* Range length
> bits[31:24] */
> + return var;
> +}
> +
> /* ACPI 1.0b: 6.4.2.5 I/O Port Descriptor */
> Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
> uint8_t aln, uint8_t len)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index 1705001..baa0652 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -162,6 +162,7 @@ Aml *aml_call1(const char *method, Aml *arg1);
> Aml *aml_call2(const char *method, Aml *arg1, Aml *arg2);
> Aml *aml_call3(const char *method, Aml *arg1, Aml *arg2, Aml *arg3);
> Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml
> *arg4);
> +Aml *aml_memory32_fixed(uint64_t addr, uint64_t size, uint8_t rw_flag);
> Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
> uint8_t aln, uint8_t len);
> Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
[Qemu-devel] [PATCH v4 12/20] hw/arm/virt-acpi-build: Add PCIe info and generate MCFG table, Shannon Zhao, 2015/04/03