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Re: [Qemu-devel] [PATCH 06/14] exec.c: Make address_space_rw take transa
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH 06/14] exec.c: Make address_space_rw take transaction attributes |
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Date: |
Thu, 9 Apr 2015 12:43:54 +0100 |
On 9 April 2015 at 12:40, Paolo Bonzini <address@hidden> wrote:
>
>
> On 09/04/2015 12:43, Peter Maydell wrote:
>> > At this point, some memory barriers, basically.
>>
>> So what distinguishes a device that needs the memory barriers
>> and does its accesses via dma_* from a device that doesn't and
>> uses address_space_* or ld/st*_phys ? (Or for that matter a
>> non-device that does memory accesses...)
>
> I don't know exactly, I didn't follow the discussion very much back
> then. The memory barriers were fixing PPC bugs; PCI devices definitely
> need them.
I suspect that actually we need barriers in a lot more places
and there shouldn't really be a separate set of APIs here;
it's just that nobody's tried using the wider set of devices
in PPC KVM systems.
-- PMM
- [Qemu-devel] [PATCH 04/14] Add MemTxAttrs to the IOTLB, (continued)
[Qemu-devel] [PATCH 02/14] memory: Add MemTxAttrs, MemTxResult to io_mem_read and io_mem_write, Peter Maydell, 2015/04/07
Re: [Qemu-devel] [PATCH 02/14] memory: Add MemTxAttrs, MemTxResult to io_mem_read and io_mem_write, Edgar E. Iglesias, 2015/04/09
[Qemu-devel] [PATCH 13/14] target-arm: Use attribute info to handle user-only watchpoints, Peter Maydell, 2015/04/07
[Qemu-devel] [PATCH 09/14] exec.c: Capture the memory attributes for a watchpoint hit, Peter Maydell, 2015/04/07