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Re: [Qemu-devel] [PATCH target-arm v2 03/15] arm: Introduce Xilinx ZynqM
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH target-arm v2 03/15] arm: Introduce Xilinx ZynqMP SoC |
Date: |
Mon, 16 Mar 2015 14:56:37 +0530 |
On Thu, Mar 5, 2015 at 10:11 AM, Alistair Francis
<address@hidden> wrote:
> On Tue, Mar 3, 2015 at 10:28 AM, Peter Crosthwaite
> <address@hidden> wrote:
>> With quad Cortex-A53 CPUs.
>>
>> Signed-off-by: Peter Crosthwaite <address@hidden>
>> ---
>> changed since v1:
>> Add &error_abort to CPU child adder call.
>>
>> default-configs/aarch64-softmmu.mak | 2 +-
>> hw/arm/Makefile.objs | 1 +
>> hw/arm/xlnx-zynqmp.c | 71
>> +++++++++++++++++++++++++++++++++++++
>> include/hw/arm/xlnx-zynqmp.h | 21 +++++++++++
>> 4 files changed, 94 insertions(+), 1 deletion(-)
>> create mode 100644 hw/arm/xlnx-zynqmp.c
>> create mode 100644 include/hw/arm/xlnx-zynqmp.h
>>
>> diff --git a/default-configs/aarch64-softmmu.mak
>> b/default-configs/aarch64-softmmu.mak
>> index 6d3b5c7..96dd994 100644
>> --- a/default-configs/aarch64-softmmu.mak
>> +++ b/default-configs/aarch64-softmmu.mak
>> @@ -3,4 +3,4 @@
>> # We support all the 32 bit boards so need all their config
>> include arm-softmmu.mak
>>
>> -# Currently no 64-bit specific config requirements
>> +CONFIG_XLNX_ZYNQMP=y
>> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
>> index 6088e53..7c6266f 100644
>> --- a/hw/arm/Makefile.objs
>> +++ b/hw/arm/Makefile.objs
>> @@ -8,3 +8,4 @@ obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o
>> pxa2xx_pic.o
>> obj-$(CONFIG_DIGIC) += digic.o
>> obj-y += omap1.o omap2.o strongarm.o
>> obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
>> +obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o
>> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
>> new file mode 100644
>> index 0000000..1b58d65
>> --- /dev/null
>> +++ b/hw/arm/xlnx-zynqmp.c
>> @@ -0,0 +1,71 @@
>> +/*
>> + * Xilinx Zynq MPSoC emulation
>> + *
>> + * Copyright (C) 2015 Xilinx Inc
>> + * Written by Peter Crosthwaite <address@hidden>
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful, but
>> WITHOUT
>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
>> + * for more details.
>> + */
>> +
>> +#include "hw/arm/xlnx-zynqmp.h"
>> +
>> +static void xlnx_zynqmp_init(Object *obj)
>> +{
>> + XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
>> + int i;
>> +
>> + for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
>> + object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
>> + "cortex-a53-" TYPE_ARM_CPU);
>> + object_property_add_child(obj, "cpu", OBJECT(&s->cpu[i]),
>> &error_abort);
>
> This property seems to cause errors. When I run:
> ./aarch64-softmmu/qemu-system-aarch64 -M xlnx-ep108
>
> I get the following error (associated with this line):
> qemu-system-aarch64: attempt to add duplicate property 'cpu' to
> object (type 'xlnx,zynqmp')
> Aborted (core dumped)
>
Fixed. I'm still confused as to how I didn't get this in V1.
Regards,
Peter
> Removing the error_abort doesn't help either, then it just seg faults
> further on.
>
> Thanks,
>
> Alistair
>
>> + }
>> +}
>> +
>> +#define ERR_PROP_CHECK_RETURN(err, errp) do { \
>> + if (err) { \
>> + error_propagate((errp), (err)); \
>> + return; \
>> + } \
>> +} while (0)
>> +
>> +static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>> +{
>> + XlnxZynqMPState *s = XLNX_ZYNQMP(dev);
>> + uint8_t i;
>> + Error *err = NULL;
>> +
>> + for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
>> + object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized",
>> &err);
>> + ERR_PROP_CHECK_RETURN(err, errp);
>> + }
>> +}
>> +
>> +static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(oc);
>> +
>> + dc->realize = xlnx_zynqmp_realize;
>> +}
>> +
>> +static const TypeInfo xlnx_zynqmp_type_info = {
>> + .name = TYPE_XLNX_ZYNQMP,
>> + .parent = TYPE_DEVICE,
>> + .instance_size = sizeof(XlnxZynqMPState),
>> + .instance_init = xlnx_zynqmp_init,
>> + .class_init = xlnx_zynqmp_class_init,
>> +};
>> +
>> +static void xlnx_zynqmp_register_types(void)
>> +{
>> + type_register_static(&xlnx_zynqmp_type_info);
>> +}
>> +
>> +type_init(xlnx_zynqmp_register_types)
>> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
>> new file mode 100644
>> index 0000000..d6b3b92
>> --- /dev/null
>> +++ b/include/hw/arm/xlnx-zynqmp.h
>> @@ -0,0 +1,21 @@
>> +#ifndef XLNX_ZYNQMP_H_
>> +
>> +#include "qemu-common.h"
>> +#include "hw/arm/arm.h"
>> +
>> +#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
>> +#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
>> + TYPE_XLNX_ZYNQMP)
>> +
>> +#define XLNX_ZYNQMP_NUM_CPUS 4
>> +
>> +typedef struct XlnxZynqMPState {
>> + /*< private >*/
>> + DeviceState parent_obj;
>> + /*< public >*/
>> +
>> + ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS];
>> +} XlnxZynqMPState;
>> +
>> +#define XLNX_ZYNQMP_H_
>> +#endif
>> --
>> 2.3.0.1.g27a12f1
>>
>>
>
- [Qemu-devel] [PATCH target-arm v2 00/15] Next Generation Xilinx Zynq SoC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 05/15] arm: xlnx-zynqmp: Connect CPU Timers to GIC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 04/15] arm: xlnx-zynqmp: Add GIC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 07/15] net: cadence_gem: Split state struct and type into header, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 13/15] arm: xilinx-ep108: Add external RAM, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 12/15] arm: Add xlnx-ep108 machine, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 03/15] arm: Introduce Xilinx ZynqMP SoC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 15/15] arm: xlnx-zynqmp: Add PSCI setup, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 02/15] target-arm: cpu64: Add support for cortex-a53, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 01/15] target-arm: cpu64: Factor out ARM cortex init, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 10/15] char: cadence_uart: Split state struct and type into header, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 09/15] char: cadence_uart: Clean up variable names, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 06/15] net: cadence_gem: Clean up variable names, Peter Crosthwaite, 2015/03/02