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[Qemu-devel] [PULL 6/7] target-i386: Move APIC ID compatibility code to
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 6/7] target-i386: Move APIC ID compatibility code to pc.c |
Date: |
Mon, 9 Mar 2015 17:40:50 -0300 |
The APIC ID compatibility code is required only for PC, and now that
x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that
code can be moved to pc.c.
Reviewed-by: Paolo Bonzini <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
hw/i386/pc.c | 35 +++++++++++++++++++++++++++++++++++
target-i386/cpu.c | 34 ----------------------------------
target-i386/cpu.h | 1 -
3 files changed, 35 insertions(+), 35 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 79eaad5..b5b2aad 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -25,6 +25,8 @@
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
#include "hw/i386/apic.h"
+#include "hw/i386/topology.h"
+#include "sysemu/cpus.h"
#include "hw/block/fdc.h"
#include "hw/ide.h"
#include "hw/pci/pci.h"
@@ -629,6 +631,39 @@ bool e820_get_entry(int idx, uint32_t type, uint64_t
*address, uint64_t *length)
return false;
}
+/* Enables contiguous-apic-ID mode, for compatibility */
+static bool compat_apic_id_mode;
+
+void enable_compat_apic_id_mode(void)
+{
+ compat_apic_id_mode = true;
+}
+
+/* Calculates initial APIC ID for a specific CPU index
+ *
+ * Currently we need to be able to calculate the APIC ID from the CPU index
+ * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces
have
+ * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
+ * all CPUs up to max_cpus.
+ */
+static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
+{
+ uint32_t correct_id;
+ static bool warned;
+
+ correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
+ if (compat_apic_id_mode) {
+ if (cpu_index != correct_id && !warned) {
+ error_report("APIC IDs set in compatibility mode, "
+ "CPU topology won't match the configuration");
+ warned = true;
+ }
+ return cpu_index;
+ } else {
+ return correct_id;
+ }
+}
+
/* Calculates the limit to CPU APIC ID values
*
* This function returns the limit for the APIC ID value, so that all
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6dd74f0..110716e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -25,7 +25,6 @@
#include "sysemu/kvm.h"
#include "sysemu/cpus.h"
#include "kvm_i386.h"
-#include "hw/i386/topology.h"
#include "qemu/option.h"
#include "qemu/config-file.h"
@@ -2822,39 +2821,6 @@ out:
}
}
-/* Enables contiguous-apic-ID mode, for compatibility */
-static bool compat_apic_id_mode;
-
-void enable_compat_apic_id_mode(void)
-{
- compat_apic_id_mode = true;
-}
-
-/* Calculates initial APIC ID for a specific CPU index
- *
- * Currently we need to be able to calculate the APIC ID from the CPU index
- * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces
have
- * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
- * all CPUs up to max_cpus.
- */
-uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
-{
- uint32_t correct_id;
- static bool warned;
-
- correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
- if (compat_apic_id_mode) {
- if (cpu_index != correct_id && !warned) {
- error_report("APIC IDs set in compatibility mode, "
- "CPU topology won't match the configuration");
- warned = true;
- }
- return cpu_index;
- } else {
- return correct_id;
- }
-}
-
static void x86_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 38bedc2..0638d24 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1328,7 +1328,6 @@ void x86_cpu_compat_kvm_no_autodisable(FeatureWord w,
uint32_t features);
/* Return name of 32-bit register, from a R_* constant */
const char *get_register_name_32(unsigned int reg);
-uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index);
void enable_compat_apic_id_mode(void);
#define APIC_DEFAULT_ADDRESS 0xfee00000
--
2.1.0
- [Qemu-devel] [PULL 0/7] X86 patches, Eduardo Habkost, 2015/03/09
- [Qemu-devel] [PULL 2/7] target-i386: Simplify listflags() function, Eduardo Habkost, 2015/03/09
- [Qemu-devel] [PULL 1/7] target-i386: Move topology.h to include/hw/i386, Eduardo Habkost, 2015/03/09
- [Qemu-devel] [PULL 3/7] target-i386: Eliminate unnecessary get_cpuid_vendor() function, Eduardo Habkost, 2015/03/09
- [Qemu-devel] [PULL 4/7] target-i386: Remove unused APIC ID default code, Eduardo Habkost, 2015/03/09
- [Qemu-devel] [PULL 5/7] target-i386: Move CPUX86State::cpuid_apic_id to X86CPU::apic_id, Eduardo Habkost, 2015/03/09
- [Qemu-devel] [PULL 6/7] target-i386: Move APIC ID compatibility code to pc.c,
Eduardo Habkost <=
- [Qemu-devel] [PULL 7/7] target-i386: Require APIC ID to be explicitly set before CPU realize, Eduardo Habkost, 2015/03/09
- Re: [Qemu-devel] [PULL 0/7] X86 patches, Peter Maydell, 2015/03/10
- Re: [Qemu-devel] [PULL 0/7] X86 patches, Eduardo Habkost, 2015/03/10