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[Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GP
From: |
Igor Mammedov |
Subject: |
[Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GPE0 resources |
Date: |
Fri, 20 Feb 2015 18:22:08 +0000 |
Drops manual hole punching in PCI0._CRS on PIIX4 machine type
for GPE0 resources. Resources will be consumed by Device(GPE0)
that is attached to PCI namespace.
There is GPE device with HID ACPI0006 since ACPI2.0
that should be used for this purpose but none of Windows
versions support it and show it as "unknown device",
so reserve resource in old fashioned way with PNP0A06
device to make windows happy and actually reserve resources.
Along with last hole _CRS layout of PIIX4 machine becomes
the same as Q35 one, so merge them together and use the same
_CRS for both machine types.
Signed-off-by: Igor Mammedov <address@hidden>
---
hw/i386/acpi-build.c | 32 +++++++++++++++++---------------
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 0de261a..2700154 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -876,21 +876,10 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8));
- if (ich9_lpc_find()) { /* Q35 */
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300));
- } else { /* piix4 */
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xAFDF, 0x0000, 0xA2E0));
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0xAFE4, 0xFFFF, 0x0000, 0x501C));
- }
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300));
aml_append(crs,
aml_dword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed,
aml_cacheable, aml_ReadWrite,
@@ -909,6 +898,19 @@ build_ssdt(GArray *table_data, GArray *linker,
}
aml_append(scope, aml_name_decl("_CRS", crs));
+ /* reserve GPE0 block resources */
+ dev = aml_device("GPE0");
+ aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
+ aml_append(dev, aml_name_decl("_UID", aml_string("GPE0 resources")));
+ /* device present, functioning, decoding, not shown in UI */
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_io(aml_decode16, pm->gpe0_blk, pm->gpe0_blk, 1, pm->gpe0_blk_len)
+ );
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+
/* reserve PCIHP resources */
if (pm->pcihp_io_len) {
dev = aml_device("PHPR");
--
1.8.3.1
- [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GPE0 resources,
Igor Mammedov <=
- [Qemu-devel] [PATCH v5 01/16] pc: acpi-build: create PCI0._CRS dynamically, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 05/16] pc: acpi-build: drop remaining ssdt_misc template, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 07/16] pc: export applesmc IO port/len, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 03/16] pc: acpi: drop manual hole punching for CPU hotplug resources, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 06/16] acpi: add acpi_irq_no_flags() term, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 02/16] pc: acpi: drop manual hole punching for PCI hotplug resources, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 09/16] tests: ACPI test blobs update due to PCI0._CRS changes, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically, Igor Mammedov, 2015/02/20
- [Qemu-devel] [PATCH v5 15/16] pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated blobs, Igor Mammedov, 2015/02/20