[Qemu-devel] [PULL 00/33] target-arm queue

[Peter Maydell]

First ARM pullreq for 2.3; the big thing here is all the TrustZone
support, though we still don't enable it for any CPUs yet, so in
theory no behavioural changes.

The following changes since commit a09f2d16f6b9f5bcdedb4d116bb54da86e9a3f6e:

  Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-20141210' 
into staging (2014-12-11 11:41:11 +0000)

are available in the git repository at:


  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20141211

for you to fetch changes up to 25f2895e0e437a3548f9794846001fb5d5ab853d:

  target-arm: Check error conditions on kvm_arm_reset_vcpu (2014-12-11 12:07:53 
+0000)

----------------------------------------------------------------
target-arm queue:
 * pass semihosting exit code out to system
 * more TrustZone support code (still not enabled yet)
 * allow user to direct semihosting to gdb or native explicitly
   rather than always auto-guessing the destination
 * fix memory leak in realview_init
 * fix coverity warning in hw/arm/boot
 * get state migration working for AArch64 CPUs
 * check errors in kvm_arm_reset_vcpu

----------------------------------------------------------------
Alex Bennée (1):
      target-arm/kvm: make reg sync code common between kvm32/64

Christoffer Dall (1):
      target-arm: Check error conditions on kvm_arm_reset_vcpu

Fabian Aggeler (18):
      target-arm: add banked register accessors
      target-arm: add CPREG secure state support
      target-arm: insert AArch32 cpregs twice into hashtable
      target-arm: move AArch32 SCR into security reglist
      target-arm: implement IRQ/FIQ routing to Monitor mode
      target-arm: add NSACR register
      target-arm: add MVBAR support
      target-arm: add SCTLR_EL3 and make SCTLR banked
      target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI
      target-arm: make CSSELR banked
      target-arm: make TTBR0/1 banked
      target-arm: make TTBCR banked
      target-arm: make DACR banked
      target-arm: make IFSR banked
      target-arm: make DFSR banked
      target-arm: make IFAR/DFAR banked
      target-arm: make PAR banked
      target-arm: make c13 cp regs banked (FCSEIDR, ...)

Greg Bellows (5):
      target-arm: extend async excp masking
      target-arm: add async excp target_el function
      target-arm: add SDER definition
      target-arm: make VBAR banked
      target-arm: make MAIR0/1 banked

Liviu Ionescu (2):
      Pass semihosting exit code back to system.
      Add the "-semihosting-config" option.

Nikita Belov (1):
      hw/arm/realview.c: Fix memory leak in realview_init()

Peter Maydell (3):
      target-arm: add secure state bit to CPREG hash
      arm_gic_kvm: Tell kernel about number of IRQs
      target-arm: Support save/load for 64 bit CPUs

Sergey Fedorov (1):
      target-arm: add non-secure Translation Block flag

zhanghailiang (1):
      hw/arm/boot: fix uninitialized scalar variable warning reported by 
coverity

 gdbstub.c                       |  15 +-
 hw/arm/boot.c                   |   4 +-
 hw/arm/pxa2xx.c                 |   6 +-
 hw/arm/realview.c               |   3 +-
 hw/intc/arm_gic_kvm.c           |  20 ++
 include/exec/gdbstub.h          |   6 +
 linux-user/aarch64/target_cpu.h |   2 +-
 linux-user/arm/target_cpu.h     |   2 +-
 linux-user/main.c               |   2 +-
 qemu-options.hx                 |  12 +-
 target-arm/arm-semi.c           |  11 +-
 target-arm/cpu.c                |  10 +-
 target-arm/cpu.h                | 364 ++++++++++++++++++---
 target-arm/helper.c             | 677 ++++++++++++++++++++++++++++++----------
 target-arm/internals.h          |   6 +-
 target-arm/kvm.c                | 107 +++++++
 target-arm/kvm32.c              | 100 +-----
 target-arm/kvm64.c              |  24 +-
 target-arm/kvm_arm.h            |  22 ++
 target-arm/machine.c            |  22 +-
 target-arm/op_helper.c          |   4 +-
 target-arm/translate.c          |  15 +-
 target-arm/translate.h          |   1 +
 vl.c                            |  48 +++
 24 files changed, 1141 insertions(+), 342 deletions(-)