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Re: [Qemu-devel] [PATCH 3/4] target-i386: add f16c and rdrand to Haswell


From: Eduardo Habkost
Subject: Re: [Qemu-devel] [PATCH 3/4] target-i386: add f16c and rdrand to Haswell and Broadwell
Date: Fri, 5 Dec 2014 16:35:11 -0200
User-agent: Mutt/1.5.23 (2014-03-12)

On Fri, Dec 05, 2014 at 06:44:25PM +0100, Paolo Bonzini wrote:
> Both were added in Ivy Bridge (for which we do not have a CPU model
> yet!).
> 
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
>  hw/i386/pc_piix.c | 4 ++++
>  hw/i386/pc_q35.c  | 4 ++++
>  target-i386/cpu.c | 4 ++--
>  3 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 3f1524e..cd9f917 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -320,6 +320,10 @@ static void pc_compat_2_2(MachineState *machine)
>      x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, CPUID_EXT_VME, 0);
>      x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, CPUID_EXT_VME, 0);
>      x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, CPUID_EXT_VME, 0);
> +    x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, CPUID_EXT_F16C, 0);
> +    x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, CPUID_EXT_RDRAND, 0);
> +    x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, CPUID_EXT_F16C, 0);
> +    x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, CPUID_EXT_RDRAND, 
> 0);

The feature should be removed on older machine-types, not added. This
should be:
    x86_cpu_compat_set_features(MODEL, FEAT_1_ECX, 0, CPUID_EXT_...)

(You can also use CPUID_EXT_F16C|CPUID_EXT_RDRAND in a single
x86_cpu_compat_set_features() call)

-- 
Eduardo



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