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[Qemu-devel] [PATCH 6/6] ahci: Fix SDB FIS Construction
From: |
John Snow |
Subject: |
[Qemu-devel] [PATCH 6/6] ahci: Fix SDB FIS Construction |
Date: |
Wed, 1 Oct 2014 18:55:51 -0400 |
The SDB FIS creation was mangled;
We were writing the error byte to byte 0,
and omitting the SDB FIS magic byte.
Though the SDB packet layout states that:
byte 0: Must be 0xA1 to indicate SDB FIS.
byte 1: Port multiplier select & other flags
byte 2: status byte.
byte 3: error byte.
This patch adds an SDB FIS structure with
human-readable names, and ensures that we
are filling the structure appropriately.
Signed-off-by: John Snow <address@hidden>
---
hw/ide/ahci.c | 18 +++++++++---------
hw/ide/ahci.h | 8 ++++++++
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 67c1e36..8002e9e 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -569,24 +569,24 @@ static void ahci_write_fis_sdb(AHCIState *s, int port,
uint32_t finished)
AHCIDevice *ad = &s->dev[port];
AHCIPortRegs *pr = &ad->port_regs;
IDEState *ide_state;
- uint8_t *sdb_fis;
+ SDBFIS *sdb_fis;
if (!s->dev[port].res_fis ||
!(pr->cmd & PORT_CMD_FIS_RX)) {
return;
}
- sdb_fis = &ad->res_fis[RES_FIS_SDBFIS];
+ sdb_fis = (SDBFIS *)&ad->res_fis[RES_FIS_SDBFIS];
ide_state = &ad->port.ifs[0];
- /* clear memory */
- *(uint32_t*)sdb_fis = 0;
-
- /* write values */
- sdb_fis[0] = ide_state->error;
- sdb_fis[2] = ide_state->status & 0x77;
+ sdb_fis->type = 0xA1;
+ /* Interrupt pending & Notification bit */
+ sdb_fis->flags = (ad->hba->control_regs.irqstatus ? (1 << 6) : 0);
+ sdb_fis->status = ide_state->status & 0x77;
+ sdb_fis->error = ide_state->error;
+ /* update SAct field in SDB_FIS */
s->dev[port].finished |= finished;
- *(uint32_t*)(sdb_fis + 4) = cpu_to_le32(ad->finished);
+ sdb_fis->payload = cpu_to_le32(ad->finished);
/* Update shadow registers (except BSY 0x80 and DRQ 0x08) */
pr->tfdata = (ad->port.ifs[0].error << 8) |
diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h
index 1543df7..a58dd09 100644
--- a/hw/ide/ahci.h
+++ b/hw/ide/ahci.h
@@ -327,6 +327,14 @@ typedef struct NCQFrame {
uint8_t reserved10;
} QEMU_PACKED NCQFrame;
+typedef struct SDBFIS {
+ uint8_t type;
+ uint8_t flags;
+ uint8_t status;
+ uint8_t error;
+ uint32_t payload;
+} QEMU_PACKED SDBFIS;
+
void ahci_init(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports);
void ahci_uninit(AHCIState *s);
--
1.9.3
- [Qemu-devel] [PATCH 1/6] ahci: Correct PIO/D2H FIS responses, (continued)
- [Qemu-devel] [PATCH 2/6] ahci: Update byte count after DMA completion, John Snow, 2014/10/01
- [Qemu-devel] [PATCH 3/6] ide: repair PIO transfers for cases where nsector > 1, John Snow, 2014/10/01
- [Qemu-devel] [PATCH 4/6] ahci: unify sglist preparation, John Snow, 2014/10/01
- [Qemu-devel] [PATCH 5/6] ide: Correct handling of malformed/short PRDTs, John Snow, 2014/10/01
- [Qemu-devel] [PATCH 6/6] ahci: Fix SDB FIS Construction,
John Snow <=
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, John Snow, 2014/10/16
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, Michael S. Tsirkin, 2014/10/25
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, Paolo Bonzini, 2014/10/27
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, Stefan Hajnoczi, 2014/10/28
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, John Snow, 2014/10/28
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, Paolo Bonzini, 2014/10/28
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, John Snow, 2014/10/28
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, Paolo Bonzini, 2014/10/28
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, John Snow, 2014/10/28
- Re: [Qemu-devel] [PATCH 0/6] AHCI Device Fixes, Paolo Bonzini, 2014/10/29