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Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn |
Date: |
Fri, 26 Sep 2014 00:43:40 +0100 |
On 26 September 2014 00:31, Edgar E. Iglesias <address@hidden> wrote:
> On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote:
>> Oh, yes, that's the trap enable bit. In that case we shouldn't
>> be using EXCP_SMC: this isn't routing the SMC exception, it's
>> taking a Hyp trap exception, and in AArch32 the vector
>> entry point is different. (Granted, you can't get to AArch32
>> by taking an exception from AArch64, but we should use the
>> right EXCP_ value to avoid the code looking gratuitously
>> different for the two cases.)
>
> I see. I hadn't thought much about the AArch32 case here. For
> AArch64, the pseudo code referes to this as route_to_el2.
Mmm, but the pseudocode keeps AArch64 and AArch32 exception
paths a lot more separate than we do, and so it doesn't need
any information about the AArch32 exception when it's dealing
with a from-AArch64 exception. Our implementation routes
both paths in common, and so it's slightly clearer to always
retain the correct info for both cases (if nothing else, it's
slightly more accurate when we print out debug log about
what exceptions we're taking).
> Anyway, your comment makes sense to avoid diff between a32/a64
> and I think it actually makes the AArch64 code a bit cleaner
> aswell.
>
> I'll add EXCP_HYP_TRAP.
Thanks.
-- PMM
- Re: [Qemu-devel] [PATCH v6 07/10] target-arm: A64: Emulate the HVC insn, (continued)
[Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Edgar E. Iglesias, 2014/09/13
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Greg Bellows, 2014/09/17
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Peter Maydell, 2014/09/25
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Edgar E. Iglesias, 2014/09/25
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Peter Maydell, 2014/09/25
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Edgar E. Iglesias, 2014/09/25
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn,
Peter Maydell <=
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Edgar E. Iglesias, 2014/09/25
- Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn, Edgar E. Iglesias, 2014/09/26
[Qemu-devel] [PATCH v6 09/10] target-arm: Add IRQ and FIQ routing to EL2 and 3, Edgar E. Iglesias, 2014/09/13
[Qemu-devel] [PATCH v6 10/10] target-arm: Add support for VIRQ and VFIQ, Edgar E. Iglesias, 2014/09/13