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[Qemu-devel] [RFC PATCH v0 11/15] ppc: Move RTAS indicator defines to a
From: |
Bharata B Rao |
Subject: |
[Qemu-devel] [RFC PATCH v0 11/15] ppc: Move RTAS indicator defines to a header file |
Date: |
Thu, 4 Sep 2014 11:36:21 +0530 |
Move RTAS indicator defines and helpers from spapr_pci.c to spapr.h
as these are needed by CPU hotplug code too.
This patch doesn't change any functionality.
Signed-off-by: Bharata B Rao <address@hidden>
---
hw/ppc/spapr_pci.c | 30 ------------------------------
include/hw/ppc/spapr.h | 30 ++++++++++++++++++++++++++++++
2 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 995b633..76463b3 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -57,36 +57,6 @@
#define RTAS_TYPE_MSI 1
#define RTAS_TYPE_MSIX 2
-/* For set-indicator RTAS interface */
-#define INDICATOR_ISOLATION_MASK 0x0001 /* 9001 one bit */
-#define INDICATOR_GLOBAL_INTERRUPT_MASK 0x0002 /* 9005 one bit */
-#define INDICATOR_ERROR_LOG_MASK 0x0004 /* 9006 one bit */
-#define INDICATOR_IDENTIFY_MASK 0x0008 /* 9007 one bit */
-#define INDICATOR_RESET_MASK 0x0010 /* 9009 one bit */
-#define INDICATOR_DR_MASK 0x00e0 /* 9002 three bits */
-#define INDICATOR_ALLOCATION_MASK 0x0300 /* 9003 two bits */
-#define INDICATOR_EPOW_MASK 0x1c00 /* 9 three bits */
-#define INDICATOR_ENTITY_SENSE_MASK 0xe000 /* 9003 three bits */
-
-#define INDICATOR_ISOLATION_SHIFT 0x00 /* bit 0 */
-#define INDICATOR_GLOBAL_INTERRUPT_SHIFT 0x01 /* bit 1 */
-#define INDICATOR_ERROR_LOG_SHIFT 0x02 /* bit 2 */
-#define INDICATOR_IDENTIFY_SHIFT 0x03 /* bit 3 */
-#define INDICATOR_RESET_SHIFT 0x04 /* bit 4 */
-#define INDICATOR_DR_SHIFT 0x05 /* bits 5-7 */
-#define INDICATOR_ALLOCATION_SHIFT 0x08 /* bits 8-9 */
-#define INDICATOR_EPOW_SHIFT 0x0a /* bits 10-12 */
-#define INDICATOR_ENTITY_SENSE_SHIFT 0x0d /* bits 13-15 */
-
-#define INDICATOR_ENTITY_SENSE_EMPTY 0
-#define INDICATOR_ENTITY_SENSE_PRESENT 1
-
-#define DECODE_DRC_STATE(state, m, s) \
- ((((uint32_t)(state) & (uint32_t)(m))) >> (s))
-
-#define ENCODE_DRC_STATE(val, m, s) \
- (((uint32_t)(val) << (s)) & (uint32_t)(m))
-
#define FDT_MAX_SIZE 0x10000
#define _FDT(exp) \
do { \
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 07f3af2..650d63c 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -442,6 +442,36 @@ int spapr_allocate_irq_block(int num, bool lsi, bool msi);
#define DIAGNOSTICS_RUN_MODE_IMMEDIATE 2
#define DIAGNOSTICS_RUN_MODE_PERIODIC 3
+/* For set-indicator RTAS interface */
+#define INDICATOR_ISOLATION_MASK 0x0001 /* 9001 one bit */
+#define INDICATOR_GLOBAL_INTERRUPT_MASK 0x0002 /* 9005 one bit */
+#define INDICATOR_ERROR_LOG_MASK 0x0004 /* 9006 one bit */
+#define INDICATOR_IDENTIFY_MASK 0x0008 /* 9007 one bit */
+#define INDICATOR_RESET_MASK 0x0010 /* 9009 one bit */
+#define INDICATOR_DR_MASK 0x00e0 /* 9002 three bits */
+#define INDICATOR_ALLOCATION_MASK 0x0300 /* 9003 two bits */
+#define INDICATOR_EPOW_MASK 0x1c00 /* 9 three bits */
+#define INDICATOR_ENTITY_SENSE_MASK 0xe000 /* 9003 three bits */
+
+#define INDICATOR_ISOLATION_SHIFT 0x00 /* bit 0 */
+#define INDICATOR_GLOBAL_INTERRUPT_SHIFT 0x01 /* bit 1 */
+#define INDICATOR_ERROR_LOG_SHIFT 0x02 /* bit 2 */
+#define INDICATOR_IDENTIFY_SHIFT 0x03 /* bit 3 */
+#define INDICATOR_RESET_SHIFT 0x04 /* bit 4 */
+#define INDICATOR_DR_SHIFT 0x05 /* bits 5-7 */
+#define INDICATOR_ALLOCATION_SHIFT 0x08 /* bits 8-9 */
+#define INDICATOR_EPOW_SHIFT 0x0a /* bits 10-12 */
+#define INDICATOR_ENTITY_SENSE_SHIFT 0x0d /* bits 13-15 */
+
+#define INDICATOR_ENTITY_SENSE_EMPTY 0
+#define INDICATOR_ENTITY_SENSE_PRESENT 1
+
+#define DECODE_DRC_STATE(state, m, s) \
+ ((((uint32_t)(state) & (uint32_t)(m))) >> (s))
+
+#define ENCODE_DRC_STATE(val, m, s) \
+ (((uint32_t)(val) << (s)) & (uint32_t)(m))
+
static inline uint64_t ppc64_phys_to_real(uint64_t addr)
{
return addr & ~0xF000000000000000ULL;
--
1.7.11.7
- [Qemu-devel] [RFC PATCH v0 09/15] ppc: Consider max_cpus during xics initialization, (continued)
- [Qemu-devel] [RFC PATCH v0 09/15] ppc: Consider max_cpus during xics initialization, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 07/15] ppc: Initialize DRC table before initializing CPUs, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 06/15] ppc: stop after getting first unused DR slot in DRC table, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 04/15] ppc: Make creation of DRC entries in FDT endian safe, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 05/15] ppc: Accommodate CPU DRC entries in DRC table, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 14/15] ppc: Add CPU hotplug support for sPAPR guests, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 12/15] ppc: Support ibm, lrdr-capacity device tree property, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 10/15] ppc: Factor out CPU initialization code to a new routine, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 13/15] ppc: Make ibm, configure-connector endian-safe, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 11/15] ppc: Move RTAS indicator defines to a header file,
Bharata B Rao <=
- [Qemu-devel] [RFC PATCH v0 02/15] ppc: Rename SPAPR_DRC_TABLE_SIZE to SPAPR_DRC_PHB_TABLE_SIZE, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 08/15] ppc: Add CPU dynamic reconfiguration (DR) support, Bharata B Rao, 2014/09/04
- [Qemu-devel] [RFC PATCH v0 15/15] ppc: Allow hotplugging of CPU cores only, Bharata B Rao, 2014/09/04