Re: [Qemu-devel] [PATCH] target-arm: Fix resetting issues on ARMv7-M CPUs

[Peter Maydell]

On 19 August 2014 14:25, Martin Galvan
<address@hidden> wrote:
> On Tue, Aug 19, 2014 at 10:06 AM, Peter Maydell
> <address@hidden> wrote:
>> I'm afraid this looks like the wrong fix for the problem you're seeing.
>> The bug you need to fix is that the ROM contents got zeroed.
>> The reset code is correct to reload SP and PC from memory --
>> this is what the hardware does.
>
> Indeed, but aren't the ROM contents supposed to get zeroed? Otherwise,
> why would we call cpu_flish_icache_range? I'm afraid "fixing" that may
> have some unwanted side effects.

Why do you think cpu_flush_icache_range has anything to do
with this? All that does is ensure that the host's instruction
cache has no stale contents for the ROM region. It doesn't
zero anything. (It's mostly there for the benefit of KVM, not TCG.)

>> > +
>> > +        /* ARMv7-M only supports Thumb instructions. If this isn't
>> > +           set we'll get an Usage Fault. */
>> > +        env->thumb = 1;
>>
>> It's true that if the thumb bit isn't set we get a usage fault, but
>> that is correct behaviour if the PC value in the vector table
>> doesn't have its low bit set. (See the TakeReset() pseudocode
>> in the ARMv7M ARM ARM.)
>
> Alright. I suppose env->thumb = pc & 1 should do the trick?

Yes. You'll notice that this is exactly what the current code does...

thanks
-- PMM