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Re: [Qemu-devel] [PATCH 5/5 v5] ppc: Add hw breakpoint watchpoint suppor


From: address@hidden
Subject: Re: [Qemu-devel] [PATCH 5/5 v5] ppc: Add hw breakpoint watchpoint support
Date: Fri, 27 Jun 2014 17:22:38 +0000

> >>> +
> >>> +static void kvm_e500_handle_debug(CPUState *cs, int handle) {
> >>> +    PowerPCCPU *cpu = POWERPC_CPU(cs);
> >>> +    CPUPPCState *env = &cpu->env;
> >>> +
> >>> +    env->spr[SPR_BOOKE_DBSR] = 0;
> >> How would KVM ever know that DBSR is now 0?
> > Yes, guest will not come to know of this "0" value. I was wrong, thinking
> about that this will be used in inject_debug_exception(), but
> inject_debug_exception() is not called in this flow.
> >
> >> And why do we need this in the first
> >> place? The guest's DBSR value doesn't get set on debug interrupts
> >> unless we call inject_debug_exception().
> > vcpu->arch.dbsr is set on debug exception in KVM and that is what guest 
> > sees,
> so we should clear DBSR.
> 
> Ah, ok. So do we actually need inject_debug_exception()?

If not then how we to inject interrupt to guest ?

> 
> >
> >> So there's no need to clear it either, no?
> > So I think I need a one_reg interface to set/clear DBSR.
> 
> The sregs interface should be good enough for now, no?

So basically we want two things
1) Just clear DBSR in KVM when debug interrupts are handled by QEMU
2) Set DSRR0/1 or CSRR0/1 and set DBSR when interrupt are not handled by QEMU


For (1); We can add a function which will use SREGS interface to clear DBSR.
For (2); we will use inject_debug_exception().


Thanks
-Bharat

> 
> 
> Alex




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