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[Qemu-devel] [PULL 04/15] pci-assign: limit # of msix vectors
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 04/15] pci-assign: limit # of msix vectors |
Date: |
Tue, 13 May 2014 14:57:13 +0200 |
From: "Michael S. Tsirkin" <address@hidden>
KVM only supports MSIX table size up to 256 vectors,
but some assigned devices support more vectors,
at the moment attempts to assign them fail with EINVAL.
Tweak the MSIX capability exposed to guest to limit table size
to a supported value.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Tested-by: Gonglei <address@hidden>
Cc: address@hidden
Acked-by: Alex Williamson <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/i386/kvm/pci-assign.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c
index 0572821..de33657 100644
--- a/hw/i386/kvm/pci-assign.c
+++ b/hw/i386/kvm/pci-assign.c
@@ -1300,6 +1300,7 @@ static int assigned_device_pci_cap_init(PCIDevice
*pci_dev, Error **errp)
if (pos != 0 && kvm_device_msix_supported(kvm_state)) {
int bar_nr;
uint32_t msix_table_entry;
+ uint16_t msix_max;
verify_irqchip_in_kernel(&local_err);
if (local_err) {
@@ -1315,9 +1316,10 @@ static int assigned_device_pci_cap_init(PCIDevice
*pci_dev, Error **errp)
}
pci_dev->msix_cap = pos;
- pci_set_word(pci_dev->config + pos + PCI_MSIX_FLAGS,
- pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS) &
- PCI_MSIX_FLAGS_QSIZE);
+ msix_max = (pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS) &
+ PCI_MSIX_FLAGS_QSIZE) + 1;
+ msix_max = MIN(msix_max, KVM_MAX_MSIX_PER_DEV);
+ pci_set_word(pci_dev->config + pos + PCI_MSIX_FLAGS, msix_max - 1);
/* Only enable and function mask bits are writable */
pci_set_word(pci_dev->wmask + pos + PCI_MSIX_FLAGS,
@@ -1327,9 +1329,7 @@ static int assigned_device_pci_cap_init(PCIDevice
*pci_dev, Error **errp)
bar_nr = msix_table_entry & PCI_MSIX_FLAGS_BIRMASK;
msix_table_entry &= ~PCI_MSIX_FLAGS_BIRMASK;
dev->msix_table_addr = pci_region[bar_nr].base_addr + msix_table_entry;
- dev->msix_max = pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS);
- dev->msix_max &= PCI_MSIX_FLAGS_QSIZE;
- dev->msix_max += 1;
+ dev->msix_max = msix_max;
}
/* Minimal PM support, nothing writable, device appears to NAK changes */
--
1.8.3.1
- [Qemu-devel] [PULL 00/15] KVM patches for 2014-05-13, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 01/15] target-i386: Remove unused data from local array, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 02/15] kvm: make one_reg helpers available for everyone, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 03/15] pci-assign: Fix a bug when map MSI-X table memory failed, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 04/15] pci-assign: limit # of msix vectors,
Paolo Bonzini <=
- [Qemu-devel] [PULL 05/15] target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 06/15] target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 07/15] target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 08/15] target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly., Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 11/15] target-i386: fix set of registers zeroed on reset, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 12/15] target-i386: preserve FPU and MSR state on INIT, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 09/15] kvm: reset state from the CPU's reset method, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 13/15] apic: do not accept SIPI on the bootstrap processor, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 10/15] kvm: forward INIT signals coming from the chipset, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 14/15] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/13