Re: [Qemu-devel] [PATCH 2/2] xilinx_timer: Fix writes into TCSR register

[Edgar E. Iglesias]

On Fri, Apr 25, 2014 at 08:39:48AM -0700, Guenter Roeck wrote:
> The TCSR register has only 11 valid bits. This is now used by the
> linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
> and later to hang when run under qemu-microblaze. Mask valid bits
> before writing the register to solve the problem.

Thanks, both patches look good. I've put them into my queue.

Cheers,
Edgar



> 
> Signed-off-by: Guenter Roeck <address@hidden>
> ---
>  hw/timer/xilinx_timer.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
> index 6113b97..3ff1da9 100644
> --- a/hw/timer/xilinx_timer.c
> +++ b/hw/timer/xilinx_timer.c
> @@ -169,7 +169,7 @@ timer_write(void *opaque, hwaddr addr,
>              if (value & TCSR_TINT)
>                  value &= ~TCSR_TINT;
>  
> -            xt->regs[addr] = value;
> +            xt->regs[addr] = value & 0x7ff;
>              if (value & TCSR_ENT)
>                  timer_enable(xt);
>              break;
> -- 
> 1.7.9.7
>