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Re: [Qemu-devel] [Bug 1308381] Re: illegal instructions for AArch64ARMv8
From: |
Janne Grunau |
Subject: |
Re: [Qemu-devel] [Bug 1308381] Re: illegal instructions for AArch64ARMv88 |
Date: |
Wed, 16 Apr 2014 13:07:57 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On 2014-04-16 11:59:58 +0100, Peter Maydell wrote:
> On 16 April 2014 11:55, Alex Bennée <address@hidden> wrote:
> >
> > Peter Maydell <address@hidden> writes:
> >
> >> Can you attach a statically linked test case binary, please?
> >
> > I can reproduce with the source file. It looks like:
> >
> > @@ -7553,12 +7555,9 @@ static void
> > disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
> > }
> > break;
> > case 0x12: /* SQXTUN */
> > - if (u) {
> > - unallocated_encoding(s);
> > - return;
> > - }
> > /* fall through */
> >
> > Fixes it.
>
> However the ARM ARM, unless I'm misreading it, requires scalar-2-misc
> SQXTUN to have U==1, so the correct fix should be to turn that "if (u)"
> into "if (!u)" I think. (Opcode 0x12 u==0 isn't in the table so should undef.)
agree, was about to send a patch
> Better check we didn't make the same mistake in the vector-2-misc
> decode as well.
The vector sqxtun2? halfword to byte is used in libav and works as
expected.
Janne
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