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Re: [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rath
From: |
Andreas Färber |
Subject: |
Re: [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rather than SPR value |
Date: |
Thu, 03 Apr 2014 20:50:32 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0 |
Am 03.04.2014 20:48, schrieb Alexander Graf:
> We now reset SPRs to their reset values on CPU reset. So if we want
> to have an SPR persistently changed, we need to change its default
> reset value rather than the value itself manually.
>
> Do this for SPR_BOOKE_PIR, fixing e500v2 SMP boot.
>
> Reported-by: Frederic Konrad <address@hidden>
Suggested-by: Andreas Färber <address@hidden>
> Signed-off-by: Alexander Graf <address@hidden>
> ---
> hw/ppc/e500.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index d7ba25f..f984b3e 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -649,7 +649,7 @@ void ppce500_init(QEMUMachineInitArgs *args,
> PPCE500Params *params)
> input = (qemu_irq *)env->irq_inputs;
> irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT];
> irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT];
> - env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i;
> + env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
> env->mpic_iack = MPC8544_CCSRBAR_BASE +
> MPC8544_MPIC_REGS_OFFSET + 0xa0;
>
.default_value then. ;)
Andreas
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