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[Qemu-devel] [PATCH] target-arm: Add ARM_CP_IO notation to PMCR reginfo
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH] target-arm: Add ARM_CP_IO notation to PMCR reginfo |
Date: |
Sat, 15 Mar 2014 18:31:31 +0000 |
Now that the PMCR writefn makes timer accesses, its reginfo needs
the ARM_CP_IO flag, so that icount mode works correctly. (Fixes
the bug accidentally introduced in commit 7c2cb42b).
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index aa5f22d..e895879 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1983,6 +1983,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
ARMCPRegInfo pmcr = {
.name = "PMCR", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 =
0,
.access = PL0_RW, .resetvalue = cpu->midr & 0xff000000,
+ .type = ARM_CP_IO,
.fieldoffset = offsetof(CPUARMState, cp15.c9_pmcr),
.accessfn = pmreg_access, .writefn = pmcr_write,
.raw_writefn = raw_write,
--
1.9.0
- [Qemu-devel] [PATCH] target-arm: Add ARM_CP_IO notation to PMCR reginfo,
Peter Maydell <=