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[Qemu-devel] [PATCH 24/26] tcg-aarch64: Prefer unsigned offsets before s
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 24/26] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst |
Date: |
Fri, 14 Mar 2014 19:48:50 -0700 |
The assembler seems to prefer them, perhaps we should too.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index fde3df7..3bbd24c 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -636,11 +636,6 @@ static void tcg_out_ldst_r(TCGContext *s, TCGMemOp size,
AArch64LdstType type,
static void tcg_out_ldst(TCGContext *s, TCGMemOp size, AArch64LdstType type,
TCGReg rd, TCGReg rn, intptr_t offset)
{
- if (offset >= -256 && offset < 256) {
- tcg_out_ldst_9(s, size, type, rd, rn, offset);
- return;
- }
-
/* If the offset is naturally aligned and in range, then we can
use the scaled uimm12 encoding */
if (offset >= 0 && !(offset & ((1 << size) - 1))) {
@@ -651,6 +646,11 @@ static void tcg_out_ldst(TCGContext *s, TCGMemOp size,
AArch64LdstType type,
}
}
+ if (offset >= -256 && offset < 256) {
+ tcg_out_ldst_9(s, size, type, rd, rn, offset);
+ return;
+ }
+
/* Worst-case scenario, move offset to temp register, use reg offset. */
tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, offset);
tcg_out_ldst_r(s, size, type, rd, rn, TCG_REG_TMP);
--
1.8.5.3
- [Qemu-devel] [PATCH 14/26] tcg-aarch64: Implement tcg_register_jit, (continued)
- [Qemu-devel] [PATCH 14/26] tcg-aarch64: Implement tcg_register_jit, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 15/26] tcg-aarch64: Avoid add with zero in tlb load, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 16/26] tcg-aarch64: Use tcg_out_call for qemu_ld/st, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 17/26] tcg-aarch64: Use ADR to pass the return address to the ld/st helpers, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 18/26] tcg-aarch64: Use TCGMemOp in qemu_ld/st, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 19/26] tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 20/26] tcg-aarch64: Introduce tcg_out_insn_3507, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 21/26] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 22/26] tcg-aarch64: Replace aarch64_ldst_op_data with TCGMemOp, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 23/26] tcg-aarch64: Replace aarch64_ldst_op_data with AArch64LdstType, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 24/26] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst,
Richard Henderson <=
- [Qemu-devel] [PATCH 25/26] tcg-aarch64: Merge tcg_out_movr with tcg_out_mov, Richard Henderson, 2014/03/14
- [Qemu-devel] [PATCH 26/26] tcg-aarch64: Support stores of zero, Richard Henderson, 2014/03/14