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Re: [Qemu-devel] [PATCH v3 21/31] target-arm: Implement AArch64 DAIF sys
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3 21/31] target-arm: Implement AArch64 DAIF system register |
Date: |
Fri, 28 Feb 2014 13:48:37 +0000 |
On 17 February 2014 00:17, Peter Crosthwaite
<address@hidden> wrote:
> On Sun, Feb 16, 2014 at 2:07 AM, Peter Maydell <address@hidden> wrote:
>> Implement the DAIF system register which is a view of the
>> DAIF bits in PSTATE.
>> +static uint64_t aa64_daif_read(CPUARMState *env, const ARMCPRegInfo *ri)
>> +{
>> + return env->daif;
>> +}
>
> Is it better to just define the .fieldoffset and do away with the
> default-behaving read handler? My understanding is this will avoid a
> call out to helper context when running under TCG as well, leading to
> a slight perf increase.
I've just remembered why I didn't do this : env->daif is 32 bits,
which means you can't use it as a fieldoffset for a 64 bit sysreg.
thanks
-- PMM
- [Qemu-devel] [PATCH v3 00/31] A64 system emulation prequisites, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 29/31] target-arm: A64: Add assertion that FP access was checked, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 13/31] target-arm: Implement AArch64 MPIDR, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 19/31] target-arm: A64: Implement WFI, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 11/31] target-arm: Implement AArch64 VBAR_EL1, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 20/31] target-arm: Store AIF bits in env->pstate for AArch32, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 09/31] target-arm: Implement AArch64 SCTLR_EL1, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 10/31] target-arm: Implement AArch64 TCR_EL1, Peter Maydell, 2014/02/15