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[Qemu-devel] [PULL 44/45] dma/pl330: Fix buffer depth
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 44/45] dma/pl330: Fix buffer depth |
Date: |
Wed, 26 Feb 2014 18:02:34 +0000 |
From: Peter Crosthwaite <address@hidden>
This is the product of the data-width and the depth arguments, I.e the
depth of the FIFO is in terms of data entries and not bytes (which is
what the original implementation was suggesting). Fix.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/dma/pl330.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 303f8b8..b5d586b 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -1606,7 +1606,7 @@ static void pl330_realize(DeviceState *dev, Error **errp)
pl330_queue_init(&s->read_queue, s->rd_q_dep, s);
pl330_queue_init(&s->write_queue, s->wr_q_dep, s);
- pl330_fifo_init(&s->fifo, s->data_buffer_dep);
+ pl330_fifo_init(&s->fifo, s->data_width / 4 * s->data_buffer_dep);
}
static Property pl330_properties[] = {
--
1.9.0
- [Qemu-devel] [PULL 45/45] dma/pl330: implement dmaadnh instruction, (continued)
- [Qemu-devel] [PULL 45/45] dma/pl330: implement dmaadnh instruction, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 25/45] target-arm: Implement AArch64 TTBR*, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 40/45] dma/pl330: Fix misleading type, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 39/45] dma/pl330: Delete overly verbose debug printf, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 41/45] dma/pl330: printf format type sweep., Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 12/45] arm: vgic device control api support, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 23/45] target-arm: Implement AArch64 TCR_EL1, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 37/45] include/qemu/crc32c.h: Rename include guards to match filename, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 36/45] target-arm: Add utility function for checking AA32/64 state of an EL, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 38/45] target-arm: Add support for AArch32 ARMv8 CRC32 instructions, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 44/45] dma/pl330: Fix buffer depth,
Peter Maydell <=
- [Qemu-devel] [PULL 35/45] target-arm: Implement AArch64 view of CPACR, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 22/45] target-arm: Implement AArch64 SCTLR_EL1, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 31/45] target-arm: Get MMU index information correct for A64 code, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 04/45] target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS ops, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 24/45] target-arm: Implement AArch64 VBAR_EL1, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 33/45] target-arm: Store AIF bits in env->pstate for AArch32, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 17/45] target-arm: Implement AArch64 MIDR_EL1, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 27/45] target-arm: Implement AArch64 generic timers, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 30/45] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 29/45] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers, Peter Maydell, 2014/02/26