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[Qemu-devel] [PULL 16/45] target-arm: Implement AArch64 CurrentEL sysreg
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 16/45] target-arm: Implement AArch64 CurrentEL sysreg |
Date: |
Wed, 26 Feb 2014 18:02:06 +0000 |
Implement the CurrentEL sysreg.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
---
target-arm/cpu.h | 3 ++-
target-arm/helper.c | 3 +++
target-arm/translate-a64.c | 7 +++++++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 8c4ed0f..632b4d1 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -731,7 +731,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
#define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8))
#define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8))
#define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8))
-#define ARM_LAST_SPECIAL ARM_CP_NZCV
+#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8))
+#define ARM_LAST_SPECIAL ARM_CP_CURRENTEL
/* Used only as a terminator for ARMCPRegInfo lists */
#define ARM_CP_SENTINEL 0xffff
/* Mask of only the flag bits in a type field */
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 2fdf3a7..ff1ed7d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1533,6 +1533,9 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
.opc0 = 3, .opc1 = 3, .opc2 = 7, .crn = 0, .crm = 0,
.access = PL0_R, .type = ARM_CP_CONST,
.resetvalue = 0x10 },
+ { .name = "CURRENTEL", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 0, .opc2 = 2, .crn = 4, .crm = 2,
+ .access = PL1_R, .type = ARM_CP_CURRENTEL },
REGINFO_SENTINEL
};
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 8752e7e..ec2d9dc 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1231,6 +1231,13 @@ static void handle_sys(DisasContext *s, uint32_t insn,
bool isread,
gen_set_nzcv(tcg_rt);
}
return;
+ case ARM_CP_CURRENTEL:
+ /* Reads as current EL value from pstate, which is
+ * guaranteed to be constant by the tb flags.
+ */
+ tcg_rt = cpu_reg(s, rt);
+ tcg_gen_movi_i64(tcg_rt, s->current_pl << 2);
+ return;
default:
break;
}
--
1.9.0
- [Qemu-devel] [PULL 00/45] target-arm queue, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 11/45] kvm: Common device control API functions, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 10/45] kvm: Introduce kvm_arch_irqchip_create, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 16/45] target-arm: Implement AArch64 CurrentEL sysreg,
Peter Maydell <=
- [Qemu-devel] [PULL 42/45] dma/pl330: Rename parent_obj, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 43/45] dma/pl330: Add event debugging printfs, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 45/45] dma/pl330: implement dmaadnh instruction, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 25/45] target-arm: Implement AArch64 TTBR*, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 40/45] dma/pl330: Fix misleading type, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 39/45] dma/pl330: Delete overly verbose debug printf, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 41/45] dma/pl330: printf format type sweep., Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 12/45] arm: vgic device control api support, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 23/45] target-arm: Implement AArch64 TCR_EL1, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 37/45] include/qemu/crc32c.h: Rename include guards to match filename, Peter Maydell, 2014/02/26