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Re: [Qemu-devel] [PATCH target-arm v4 1/3] xilinx_zynq: added SMP suppor
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH target-arm v4 1/3] xilinx_zynq: added SMP support: |
Date: |
Wed, 15 Jan 2014 16:47:49 +1000 |
On Sat, Jan 11, 2014 at 4:08 AM, Peter Maydell <address@hidden> wrote:
> On 2 January 2014 07:30, Peter Crosthwaite <address@hidden> wrote:
>> Added Linux SMP support for the Xilinx Zynq platform (2x CPUs are
>> supported)
>>
>> Signed-off-by: Peter Crosthwaite <address@hidden>
>> ---
>> Changed from v3:
>> Author reset
>> s/zynq_cpus/cpus
>> simplified custom secondary bootloader
>> Rebased
>> Changed from v2:
>> macro defined the maximum number of CPUS
>> Changed from v1:
>> Addressed PMM review
>> Shorted secondary bootloop using MVN instruction.
>> Used default reset secondary instead of custom one.
>> Rebased against QOM cpu developments.
>> Few whitespace fixes.
>>
>> hw/arm/xilinx_zynq.c | 69
>> ++++++++++++++++++++++++++++++++++++++++------------
>> 1 file changed, 53 insertions(+), 16 deletions(-)
>>
>> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
>> index 17251c7..c09ff36 100644
>> --- a/hw/arm/xilinx_zynq.c
>> +++ b/hw/arm/xilinx_zynq.c
>> @@ -27,6 +27,8 @@
>> #include "hw/ssi.h"
>> #include "qemu/error-report.h"
>>
>> +#define MAX_CPUS 2
>> +
>> #define NUM_SPI_FLASHES 4
>> #define NUM_QSPI_FLASHES 2
>> #define NUM_QSPI_BUSSES 2
>> @@ -38,10 +40,37 @@
>>
>> #define MPCORE_PERIPHBASE 0xF8F00000
>>
>> +/* Dummy bootreg addr to keep ARM bootloader happy. Very top of OCM */
>> +#define SMP_BOOTREG_ADDR 0xfffffffc
>
> It would probably be nicer to provide your own
> reset_secondary hook, and then hw/arm/boot.c won't
> ever look at what you set in bootreg_addr.
>
Yep, thatll be much cleaner. Thanks. All fixed in v2.
Regards,
Peter
> Looks ok otherwise, though.
>
> thanks
> -- PMM
>