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[Qemu-devel] [PULL 51/62] hw/arm: add very initial support for Canon DIG
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 51/62] hw/arm: add very initial support for Canon DIGIC SoC |
Date: |
Tue, 17 Dec 2013 20:29:09 +0000 |
From: Antony Pavlov <address@hidden>
DIGIC is Canon Inc.'s name for a family of SoC
for digital cameras and camcorders.
There is no publicly available specification for
DIGIC chips. All information about DIGIC chip
internals is based on reverse engineering efforts
made by CHDK (http://chdk.wikia.com) and
Magic Lantern (http://www.magiclantern.fm) projects
contributors.
Signed-off-by: Antony Pavlov <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs | 1 +
hw/arm/digic.c | 71 +++++++++++++++++++++++++++++++++++++++++
include/hw/arm/digic.h | 35 ++++++++++++++++++++
4 files changed, 108 insertions(+)
create mode 100644 hw/arm/digic.c
create mode 100644 include/hw/arm/digic.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index e48f102..2135be3 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -64,6 +64,7 @@ CONFIG_XILINX_SPIPS=y
CONFIG_ARM11SCU=y
CONFIG_A9SCU=y
+CONFIG_DIGIC=y
CONFIG_MARVELL_88W8618=y
CONFIG_OMAP=y
CONFIG_TSC210X=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 78b5614..8789807 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -4,4 +4,5 @@ obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o
obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o
obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o
+obj-$(CONFIG_DIGIC) += digic.o
obj-y += omap1.o omap2.o strongarm.o
diff --git a/hw/arm/digic.c b/hw/arm/digic.c
new file mode 100644
index 0000000..2620262
--- /dev/null
+++ b/hw/arm/digic.c
@@ -0,0 +1,71 @@
+/*
+ * QEMU model of the Canon DIGIC SoC.
+ *
+ * Copyright (C) 2013 Antony Pavlov <address@hidden>
+ *
+ * This model is based on reverse engineering efforts
+ * made by CHDK (http://chdk.wikia.com) and
+ * Magic Lantern (http://www.magiclantern.fm) projects
+ * contributors.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "hw/arm/digic.h"
+
+static void digic_init(Object *obj)
+{
+ DigicState *s = DIGIC(obj);
+
+ object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
+ object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+}
+
+static void digic_realize(DeviceState *dev, Error **errp)
+{
+ DigicState *s = DIGIC(dev);
+ Error *err = NULL;
+
+ object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
+
+ object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
+}
+
+static void digic_class_init(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ dc->realize = digic_realize;
+}
+
+static const TypeInfo digic_type_info = {
+ .name = TYPE_DIGIC,
+ .parent = TYPE_DEVICE,
+ .instance_size = sizeof(DigicState),
+ .instance_init = digic_init,
+ .class_init = digic_class_init,
+};
+
+static void digic_register_types(void)
+{
+ type_register_static(&digic_type_info);
+}
+
+type_init(digic_register_types)
diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h
new file mode 100644
index 0000000..b7d16fb
--- /dev/null
+++ b/include/hw/arm/digic.h
@@ -0,0 +1,35 @@
+/*
+ * Misc Canon DIGIC declarations.
+ *
+ * Copyright (C) 2013 Antony Pavlov <address@hidden>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef HW_ARM_DIGIC_H
+#define HW_ARM_DIGIC_H
+
+#include "cpu.h"
+
+#define TYPE_DIGIC "digic"
+
+#define DIGIC(obj) OBJECT_CHECK(DigicState, (obj), TYPE_DIGIC)
+
+typedef struct DigicState {
+ /*< private >*/
+ DeviceState parent_obj;
+ /*< public >*/
+
+ ARMCPU cpu;
+} DigicState;
+
+#endif /* HW_ARM_DIGIC_H */
--
1.8.5
- [Qemu-devel] [PULL 00/62] target-arm queue, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 08/62] Fix NOR flash device ID reading, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 56/62] MAINTAINERS: Document 'Canon DIGIC' machine, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 40/62] target-arm: A64: add support for ADR and ADRP, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 62/62] MAINTAINERS: add myself to maintain allwinner-a10, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 51/62] hw/arm: add very initial support for Canon DIGIC SoC,
Peter Maydell <=
- [Qemu-devel] [PULL 50/62] target-arm: A64: add support for logical (immediate) insns, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 10/62] target-arm: Define and use ARM_FEATURE_CBAR, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 42/62] target-arm: A64: add support for 2-src data processing and DIV, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 45/62] target-arm: A64: add support for 1-src RBIT insn, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 53/62] hw/arm/digic: add timer support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 58/62] hw/timer: add allwinner a10 timer, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 52/62] hw/arm/digic: prepare DIGIC-based boards support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 48/62] host-utils: add clrsb32/64 - count leading redundant sign bits, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 47/62] target-arm: A64: add support for bitfield insns, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 46/62] target-arm: A64: add support for 1-src REV insns, Peter Maydell, 2013/12/17