[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 56/60] target-i386: Tidy gen_add_A0_im
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 56/60] target-i386: Tidy gen_add_A0_im |
Date: |
Fri, 29 Nov 2013 16:00:43 +1300 |
Merge gen_op_addl_A0_im and gen_op_addq_A0_im into gen_add_A0_im
and clean up the ifdef.
Replace the one remaining user of gen_op_addl_A0_im with gen_add_A0_im.
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 27 +++++----------------------
1 file changed, 5 insertions(+), 22 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 19cabf6..ee9d586 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -376,29 +376,12 @@ static inline void gen_op_mov_v_reg(TCGMemOp ot, TCGv t0,
int reg)
}
}
-static inline void gen_op_addl_A0_im(int32_t val)
-{
- tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
-#ifdef TARGET_X86_64
- tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
-#endif
-}
-
-#ifdef TARGET_X86_64
-static inline void gen_op_addq_A0_im(int64_t val)
-{
- tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
-}
-#endif
-
static void gen_add_A0_im(DisasContext *s, int val)
{
-#ifdef TARGET_X86_64
- if (CODE64(s))
- gen_op_addq_A0_im(val);
- else
-#endif
- gen_op_addl_A0_im(val);
+ tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
+ if (!CODE64(s)) {
+ tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
+ }
}
static inline void gen_op_jmp_T0(void)
@@ -6231,7 +6214,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
exception */
gen_op_jmp_T0();
/* pop selector */
- gen_op_addl_A0_im(1 << dflag);
+ gen_add_A0_im(s, 1 << dflag);
gen_op_ld_v(s, dflag, cpu_T[0], cpu_A0);
gen_op_movl_seg_T0_vm(R_CS);
/* add stack offset */
--
1.8.3.1
- [Qemu-devel] [PATCH v2 45/60] target-i386: Access segs via TCG registers, (continued)
- [Qemu-devel] [PATCH v2 45/60] target-i386: Access segs via TCG registers, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 33/60] target-i386: Change gen_op_add_reg_* size parameter to TCGMemOp, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 48/60] target-i386: Introduce mo_stacksize, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 49/60] target-i386: Rewrite leave, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 50/60] target-i386: Remove gen_op_mov_reg_T0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 51/60] target-i386: Remove gen_op_mov_reg_T1, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 52/60] target-i386: Remove gen_op_addl_T0_T1, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 53/60] target-i386: Remove gen_op_mov_TN_reg, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 54/60] target-i386: Remove gen_op_mov_reg_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 55/60] target-i386: Remove gen_op_movl_A0_reg, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 56/60] target-i386: Tidy gen_add_A0_im,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 57/60] target-i386: Tidy some size computation, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 58/60] target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_v, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 59/60] target-i386: Tidy ljmp, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 60/60] target-i386: Deconstruct the cpu_T array, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 47/60] target-i386: Rewrite gen_enter inline, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 46/60] target-i386: Use gen_lea_v_seg in pusha/popa, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 34/60] target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOp, Richard Henderson, 2013/11/28