[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v3 08/11] AARCH64: Enable SMP support for aarch64 pr
From: |
Mian M. Hamayun |
Subject: |
[Qemu-devel] [PATCH v3 08/11] AARCH64: Enable SMP support for aarch64 processors using PSCI method |
Date: |
Fri, 27 Sep 2013 12:10:11 +0200 |
From: "Mian M. Hamayun" <address@hidden>
We enable SMP support for aarch64 processors using the PSCI method,
by setting the appropriate CPU feature flags at initilializtion time.
Secondary boot code for non-aarch64 processors is disabled in case
of compilation for aarch64.
Signed-off-by: Mian M. Hamayun <address@hidden>
---
hw/arm/boot.c | 4 ++++
target-arm/kvm_64.c | 7 +++++++
2 files changed, 11 insertions(+)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 0471eb8..ddafd3b 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -157,6 +157,7 @@ static void setup_boot_env(ARMCPU *cpu)
static void default_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
+#ifndef TARGET_AARCH64
int n;
smpboot[smpboot_array_size - 1] = info->smp_bootreg_addr;
smpboot[smpboot_array_size - 2] = info->gic_cpu_if_addr;
@@ -171,15 +172,18 @@ static void default_write_secondary(ARMCPU *cpu,
rom_add_blob_fixed("smpboot", smpboot,
smpboot_array_size * sizeof(uint32_t),
info->smp_loader_start);
+#endif
}
static void default_reset_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
+#ifndef TARGET_AARCH64
CPUARMState *env = &cpu->env;
stl_phys_notdirty(info->smp_bootreg_addr, 0);
env->regs[15] = info->smp_loader_start;
+#endif
}
#define WRITE_WORD(p, value) do { \
diff --git a/target-arm/kvm_64.c b/target-arm/kvm_64.c
index 9685727..146b7c4 100644
--- a/target-arm/kvm_64.c
+++ b/target-arm/kvm_64.c
@@ -27,12 +27,19 @@ static uint32_t kvm_arm_targets[KVM_ARM_NUM_TARGETS] = {
KVM_ARM_TARGET_CORTEX_A57
};
+#define ARM_VCPU_FEATURE_FLAGS(cpuid, is_aarch32) \
+((!!(cpuid) << KVM_ARM_VCPU_POWER_OFF) | (is_aarch32 <<
KVM_ARM_VCPU_EL1_32BIT))
+
int kvm_arch_init_vcpu(CPUState *cs)
{
struct kvm_vcpu_init init;
int ret, i;
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+
memset(init.features, 0, sizeof(init.features));
+ init.features[0] = ARM_VCPU_FEATURE_FLAGS(cs->cpu_index, !env->aarch64);
/* Find an appropriate target CPU type.
* KVM does not provide means to detect the host CPU type on aarch64,
* and simply refuses to initialize, if the CPU type mis-matches;
--
1.8.1.2
- [Qemu-devel] [PATCH v3 00/11] AARCH64 support on machvirt machine model using KVM, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 01/11] ARM: arm64 kvm headers from kernel arm64-kvm tree, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 02/11] AARCH64: add a57core, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 03/11] AARCH64: Add A57 CPU to default AArch64 configuration and enable KVM, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 04/11] AARCH64: Separate 32-bit specific code from common KVM hooks, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 05/11] AARCH64: Add AARCH64 CPU initialization, get and put registers support, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 06/11] target-arm: Parameterize the bootloader selection and setup mechanism, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 07/11] AARCH64: Add boot support for aarch64 processor, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 08/11] AARCH64: Enable SMP support for aarch64 processors using PSCI method,
Mian M. Hamayun <=
- [Qemu-devel] [PATCH v3 09/11] AARCH64: Enable configure support for 32-bit guests on AARCH64, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 10/11] AARCH64: Add flags and boot parameters for 32-bit guests on AARCH64, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 11/11] AARCH64: Add 32-bit mode selection parameter, Mian M. Hamayun, 2013/09/27