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[Qemu-devel] [PATCH 05/10] target-s390: Implement SAM31 and SAM64
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 05/10] target-s390: Implement SAM31 and SAM64 |
Date: |
Mon, 23 Sep 2013 07:04:40 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-s390x/insn-data.def | 8 ++++----
target-s390x/translate.c | 29 +++++++++++++++++++++++++++++
2 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 4b462d4..c528eb4 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -566,6 +566,10 @@
/* SET ACCESS */
C(0xb24e, SAR, RRE, Z, 0, r2_o, 0, 0, sar, 0)
+/* SET ADDRESSING MODE */
+ /* We only do 32 and 64-bit. Let SAM24 signal illegal instruction. */
+ C(0x010d, SAM31, E, Z, 0, 0, 0, 0, sam31, 0)
+ C(0x010e, SAM64, E, Z, 0, 0, 0, 0, sam64, 0)
/* SET FPC */
C(0xb384, SFPC, RRE, Z, 0, r1_o, 0, 0, sfpc, 0)
/* SET FPC AND SIGNAL */
@@ -745,10 +749,6 @@
C(0xb22a, RRBE, RRE, Z, 0, r2_o, 0, 0, rrbe, 0)
/* SERVICE CALL LOGICAL PROCESSOR (PV hypercall) */
C(0xb220, SERVC, RRE, Z, r1_o, r2_o, 0, 0, servc, 0)
-/* SET ADDRESSING MODE */
- /* We only do 64-bit, so accept this as a no-op.
- Let SAM24 and SAM31 signal illegal instruction. */
- C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0)
/* SET ADDRESS SPACE CONTROL FAST */
C(0xb279, SACF, S, Z, 0, a2, 0, 0, sacf, 0)
/* SET CLOCK */
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index c8bbedb..6ca8f0b 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -2912,6 +2912,35 @@ static ExitStatus op_sacf(DisasContext *s, DisasOps *o)
}
#endif
+static ExitStatus op_sam31(DisasContext *s, DisasOps *o)
+{
+ /* Bizzare but true, we check the address of the current insn for the
+ specification exception, not the next to be executed. Thus the PoO
+ documents that Bad Things Happen at 0x7ffffffe. */
+ if (s->pc & ~0x7ffffff) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return EXIT_NORETURN;
+ }
+
+ tcg_gen_andi_i64(psw_mask, psw_mask, ~PSW_MASK_64);
+ tcg_gen_ori_i64(psw_mask, psw_mask, PSW_MASK_32);
+
+ /* Always exit the TB, since we (may have) changed execution mode. */
+ s->pc = s->next_pc & 0x7fffffff;
+ update_psw_addr(s);
+ return EXIT_PC_UPDATED;
+}
+
+static ExitStatus op_sam64(DisasContext *s, DisasOps *o)
+{
+ tcg_gen_ori_i64(psw_mask, psw_mask, PSW_MASK_32 | PSW_MASK_64);
+
+ /* Always exit the TB, since we (may have) changed execution mode. */
+ s->pc = s->next_pc;
+ update_psw_addr(s);
+ return EXIT_PC_UPDATED;
+}
+
static ExitStatus op_sar(DisasContext *s, DisasOps *o)
{
int r1 = get_field(s->fields, r1);
--
1.8.1.4
- [Qemu-devel] [PATCH 0/9] target-s390 tcg improvements, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 04/10] target-s390: Raise OPERATION exception for disabled insns, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 02/10] target-s390: Implement STFLE, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 01/10] target-s390: Move facilities bits to env, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 03/10] target-s390: Add facilities bits and sets, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 06/10] target-s390: Implement EPSW, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 05/10] target-s390: Implement SAM31 and SAM64,
Richard Henderson <=
- [Qemu-devel] [PATCH 07/10] target-s390: Fix STIDP, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 10/10] target-s390: Implement ECAG, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 09/10] target-s390: Implement LURA, LURAG, STURG, Richard Henderson, 2013/09/23
- [Qemu-devel] [PATCH 08/10] target-s390: Fix STURA, Richard Henderson, 2013/09/23
- Re: [Qemu-devel] [PATCH 0/9] target-s390 tcg improvements, Alexander Graf, 2013/09/30