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[Qemu-devel] [PULL 06/29] tcg: Change flush_icache_range arguments to ui
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 06/29] tcg: Change flush_icache_range arguments to uintptr_t |
Date: |
Mon, 2 Sep 2013 09:28:51 -0700 |
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.h | 3 +--
tcg/arm/tcg-target.h | 9 ++++-----
tcg/hppa/tcg-target.h | 3 +--
tcg/i386/tcg-target.h | 3 +--
tcg/ia64/tcg-target.h | 3 +--
tcg/mips/tcg-target.h | 3 +--
tcg/s390/tcg-target.h | 3 +--
tcg/sparc/tcg-target.h | 12 ++++--------
tcg/tcg.c | 6 ++----
tcg/tci/tcg-target.h | 3 +--
10 files changed, 17 insertions(+), 31 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 26ee28b..d3a1bc2 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -96,8 +96,7 @@ enum {
TCG_AREG0 = TCG_REG_X19,
};
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
__builtin___clear_cache((char *)start, (char *)stop);
}
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index ed48092..9482bfa 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -92,15 +92,14 @@ enum {
TCG_AREG0 = TCG_REG_R6,
};
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
#if QEMU_GNUC_PREREQ(4, 1)
__builtin___clear_cache((char *) start, (char *) stop);
#else
- register unsigned long _beg __asm ("a1") = start;
- register unsigned long _end __asm ("a2") = stop;
- register unsigned long _flg __asm ("a3") = 0;
+ register uintptr_t _beg __asm("a1") = start;
+ register uintptr_t _end __asm("a2") = stop;
+ register uintptr_t _flg __asm("a3") = 0;
__asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
#endif
}
diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
index 0f6f2ff..be5895f 100644
--- a/tcg/hppa/tcg-target.h
+++ b/tcg/hppa/tcg-target.h
@@ -111,8 +111,7 @@ typedef enum {
#define TCG_AREG0 TCG_REG_R17
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
start &= ~31;
while (start <= stop) {
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b7d1a55..1f6c7eb 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -139,8 +139,7 @@ typedef enum {
# define TCG_AREG0 TCG_REG_EBP
#endif
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
}
diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h
index ee6b2c8..4330c9c 100644
--- a/tcg/ia64/tcg-target.h
+++ b/tcg/ia64/tcg-target.h
@@ -162,8 +162,7 @@ typedef enum {
#define TCG_AREG0 TCG_REG_R7
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
start = start & ~(32UL - 1UL);
stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL);
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 7ef79e0..a820328 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -127,8 +127,7 @@ typedef enum {
#include <sys/cachectl.h>
#endif
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
cacheflush ((void *)start, stop-start, ICACHE);
}
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index b02f170..6142fb2 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -114,8 +114,7 @@ enum {
TCG_AREG0 = TCG_REG_R10,
};
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
}
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 1a696bc..c0d3abc 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -142,16 +142,12 @@ typedef enum {
#define TCG_AREG0 TCG_REG_I0
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
- unsigned long p;
-
- p = start & ~(8UL - 1UL);
- stop = (stop + (8UL - 1UL)) & ~(8UL - 1UL);
-
- for (; p < stop; p += 8)
+ uintptr_t p;
+ for (p = start & -8; p < (stop + 7) & -8; p += 8) {
__asm__ __volatile__("flush\t%0" : : "r" (p));
+ }
}
#endif
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 541a442..65cffca 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -293,8 +293,7 @@ void tcg_prologue_init(TCGContext *s)
s->code_buf = s->code_gen_prologue;
s->code_ptr = s->code_buf;
tcg_target_qemu_prologue(s);
- flush_icache_range((tcg_target_ulong)s->code_buf,
- (tcg_target_ulong)s->code_ptr);
+ flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr);
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
@@ -2415,8 +2414,7 @@ int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
tcg_gen_code_common(s, gen_code_buf, -1);
/* flush instruction cache */
- flush_icache_range((tcg_target_ulong)gen_code_buf,
- (tcg_target_ulong)s->code_ptr);
+ flush_icache_range((uintptr_t)gen_code_buf, (uintptr_t)s->code_ptr);
return s->code_ptr - gen_code_buf;
}
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index ff12b4b..e284972 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -172,8 +172,7 @@ void tci_disas(uint8_t opc);
tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
#define tcg_qemu_tb_exec tcg_qemu_tb_exec
-static inline void flush_icache_range(tcg_target_ulong start,
- tcg_target_ulong stop)
+static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
}
--
1.8.1.4
- [Qemu-devel] [PULL 00/29] Three tcg patch sets, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 01/29] tcg: Add muluh and mulsh opcodes, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 02/29] tcg-mips: Implement mulsh, muluh, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 03/29] tcg-ppc64: Implement muluh, mulsh, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 04/29] tcg: Constant fold div, rem, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 05/29] qtest: Fix FMT_timeval vs time_t, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 06/29] tcg: Change flush_icache_range arguments to uintptr_t,
Richard Henderson <=
- [Qemu-devel] [PULL 07/29] tcg: Change tcg_qemu_tb_exec return to uintptr_t, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 08/29] tcg: Fix next_tb type in cpu_exec, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 09/29] tcg: Allow TCG_TARGET_REG_BITS to be specified independantly, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 10/29] tcg: Define TCG_TYPE_PTR properly, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 11/29] tcg: Define TCG_ptr properly, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 12/29] tcg: Change frame pointer offsets to intptr_t, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 13/29] tcg: Change memory offsets to intptr_t, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 14/29] tcg: Change relocation offsets to intptr_t, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 15/29] tcg: Use uintptr_t in TCGHelperInfo, Richard Henderson, 2013/09/02
- [Qemu-devel] [PULL 16/29] tcg: Change tcg_gen_exit_tb argument to uintptr_t, Richard Henderson, 2013/09/02