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[Qemu-devel] [PULL 2/5] hw/alpha: Don't machine check on missing pci i/o
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 2/5] hw/alpha: Don't machine check on missing pci i/o |
Date: |
Sun, 14 Jul 2013 15:16:08 -0700 |
Not really correct, but we don't implement all of the random devices
that the kernel looks for. This is good enough to keep us booting.
Signed-off-by: Richard Henderson <address@hidden>
---
hw/alpha/alpha_sys.h | 1 +
hw/alpha/pci.c | 26 ++++++++++++++++++++++++++
hw/alpha/typhoon.c | 3 ++-
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h
index 0987851..e11025b 100644
--- a/hw/alpha/alpha_sys.h
+++ b/hw/alpha/alpha_sys.h
@@ -14,6 +14,7 @@ PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *,
AlphaCPU *[4],
pci_map_irq_fn);
/* alpha_pci.c. */
+extern const MemoryRegionOps alpha_pci_ignore_ops;
extern const MemoryRegionOps alpha_pci_conf1_ops;
extern const MemoryRegionOps alpha_pci_iack_ops;
diff --git a/hw/alpha/pci.c b/hw/alpha/pci.c
index 25637e0..d839dd5 100644
--- a/hw/alpha/pci.c
+++ b/hw/alpha/pci.c
@@ -12,6 +12,32 @@
#include "sysemu/sysemu.h"
+/* Fallback for unassigned PCI I/O operations. Avoids MCHK. */
+
+static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
+{
+ return 0;
+}
+
+static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
+{
+}
+
+const MemoryRegionOps alpha_pci_ignore_ops = {
+ .read = ignore_read,
+ .write = ignore_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ },
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 8,
+ },
+};
+
+
/* PCI config space reads/writes, to byte-word addressable memory. */
static uint64_t bw_conf1_read(void *opaque, hwaddr addr,
unsigned size)
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 9dac9df..69e2255 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -764,7 +764,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
&s->pchip.reg_mem);
/* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */
- memory_region_init(&s->pchip.reg_io, OBJECT(s), "pci0-io", 32*MB);
+ memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_ignore_ops,
+ NULL, "pci0-io", 32*MB);
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);
--
1.8.3.1
- [Qemu-devel] [PULL 0/5] alpha-softmmu fixes, Richard Henderson, 2013/07/14
- [Qemu-devel] [PULL 1/5] hw/alpha: Don't use get_system_io, Richard Henderson, 2013/07/14
- [Qemu-devel] [PULL 2/5] hw/alpha: Don't machine check on missing pci i/o,
Richard Henderson <=
- [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Richard Henderson, 2013/07/14
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Markus Armbruster, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Paolo Bonzini, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Richard Henderson, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Paolo Bonzini, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Richard Henderson, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Paolo Bonzini, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Anthony Liguori, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Paolo Bonzini, 2013/07/17
- Re: [Qemu-devel] [PULL 3/5] exec: Support 64-bit operations in address_space_rw, Richard Henderson, 2013/07/17