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Re: [Qemu-devel] SEV and WFE instructions on ARM
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] SEV and WFE instructions on ARM |
Date: |
Thu, 6 Jun 2013 19:17:05 +0100 |
On 6 June 2013 15:34, Sebastian Huber
<address@hidden> wrote:
> I want to use Qemu to test some SMP code. For this I set up Qemu to fire up
> two Cortex-A9 MPCore CPUs. I have the following ticket lock implementation:
QEMU is not a very good choice for this sort of testing,
because we do not implement any of:
* execution of multiple CPUs in parallel
* barriers as anything other than NOPs [this is OK because
we don't execute CPUs in parallel]
* non-NOP WFE
* caches
and so there are large classes of guest code bugs that will never
manifest under QEMU.
I would strongly advise testing your SMP primitives on real hardware.
> It seems that the SEV/WFE instructions are implemented as a nop on Qemu (see
> in file "target-arm/translate.c" function gen_nop_hint()).
This is an architecturally valid implementation (though perhaps
not the most useful one possible).
> So the simulator
> executes the busy wait loop most of the time. Is it possible to trigger a
> schedule event in Qemu which stops the simulation on one CPU and selects
> another CPU instead?
It would be possible to implement WFE "properly" in a similar
manner to how we currently handle WFI. (You'd need to actually
implement the underlying 'event register' and make sure it got
set by SEV and all the other cases which the architecture lists.)
If you did that then a WFE would cause execution of one guest
CPU to pause and the next one to start.
thanks
-- PMM