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Re: [Qemu-devel] [PATCH 2/4] acpi/gpe: expand bits of gpe register
From: |
li guang |
Subject: |
Re: [Qemu-devel] [PATCH 2/4] acpi/gpe: expand bits of gpe register |
Date: |
Tue, 28 May 2013 08:32:31 +0800 |
在 2013-05-27一的 11:00 +0200,Gerd Hoffmann写道:
> On 05/24/13 04:02, li guang wrote:
> > 在 2013-05-24五的 10:24 +0900,Isaku Yamahata写道:
> >> On Wed, May 22, 2013 at 01:37:41PM +0800, li guang wrote:
> >>> 在 2013-05-22三的 14:28 +0900,Isaku Yamahata写道:
> >>>> Why?
> >>>> And it breaks pointer operation like
> >>>
> >>> the fact is I can't guess why gpe->sts is defined uint8_t
> >>> but the real hardware is 32-bit width.
> >>
> >> Which section of ACPI spec?
> >
> > seems ACPI SPEC does not define the length,
> > but, real hardware does, e.g. ICH9.
>
> Still fail to see what exactly you are trying to fix.
>
> qemu can continue work with uint8_t internally just fine. memory api
> will split dword access by guests into 4 byte accesses. ich9_gpe_ops
> looks correct.
>
> >>> I expand it to 32 because the future usage for me will
> >>> access bit beyond 8.
>
> gpe->sts is an array, so you already have more than 8 bits.
>
> >> I don't have strong opinion wheter uint8_t or uint32_t.
> >> But the current patch is broken as the pointer offset
> >> operation needs to be fixed.
>
> Oh, and it breaks live migration too.
>
Yes, I will re-consider this.
Thanks!
[Qemu-devel] [PATCH 1/4] acpi: add ACPI Embedded Controller support, liguang, 2013/05/21
[Qemu-devel] [PATCH 3/4] ich9: add notifer for ec to generate sci, liguang, 2013/05/21
[Qemu-devel] [PATCH 4/4][seabios] ec: add ASL for ACPI Embedded Controller, liguang, 2013/05/21
Re: [Qemu-devel] [PATCH 0/4] add ACPI Embedded Controller, li guang, 2013/05/23