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[Qemu-devel] [PATCH v5 14/33] tcg-ppc64: Improve and_i32 with constant
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v5 14/33] tcg-ppc64: Improve and_i32 with constant |
Date: |
Mon, 15 Apr 2013 20:40:53 +0200 |
Use RLWINM
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 50 +++++++++++++++++++++++++++++++++++++++++++++++++-
tcg/ppc64/tcg-target.h | 6 ++++--
2 files changed, 53 insertions(+), 3 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index c8cae72..1b0563f 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -527,6 +527,48 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
TCGReg ret,
}
}
+static inline bool mask_operand(uint32_t c, int *mb, int *me)
+{
+ uint32_t lsb, test;
+
+ /* Accept a bit pattern like:
+ 0....01....1
+ 1....10....0
+ 0..01..10..0
+ Keep track of the transitions. */
+ if (c == 0 || c == -1) {
+ return false;
+ }
+ test = c;
+ lsb = test & -test;
+ test += lsb;
+ if (test & (test - 1)) {
+ return false;
+ }
+
+ *me = clz32(lsb);
+ *mb = test ? clz32(test & -test) + 1 : 0;
+ return true;
+}
+
+static void tcg_out_andi32(TCGContext *s, TCGReg dst, TCGReg src, uint32_t c)
+{
+ int mb, me;
+
+ if ((c & 0xffff) == c) {
+ tcg_out32(s, ANDI | SAI(src, dst, c));
+ return;
+ } else if ((c & 0xffff0000) == c) {
+ tcg_out32(s, ANDIS | SAI(src, dst, c >> 16));
+ return;
+ } else if (mask_operand(c, &mb, &me)) {
+ tcg_out_rlw(s, RLWINM, dst, src, 0, mb, me);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_I32, 0, c);
+ tcg_out32(s, AND | SAB(src, dst, 0));
+ }
+}
+
static void tcg_out_zori32(TCGContext *s, TCGReg dst, TCGReg src, uint32_t c,
int op_lo, int op_hi)
{
@@ -1352,9 +1394,15 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
const TCGArg *args,
}
break;
- case INDEX_op_and_i64:
case INDEX_op_and_i32:
if (const_args[2]) {
+ tcg_out_andi32(s, args[0], args[1], args[2]);
+ } else {
+ tcg_out32(s, AND | SAB(args[1], args[0], args[2]));
+ }
+ break;
+ case INDEX_op_and_i64:
+ if (const_args[2]) {
if ((args[2] & 0xffff) == args[2]) {
tcg_out32(s, ANDI | SAI(args[1], args[0], args[2]));
} else if ((args[2] & 0xffff0000) == args[2]) {
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index aa6a0f0..f1c3067 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -67,13 +67,15 @@ typedef enum {
#define TCG_TARGET_STACK_ALIGN 16
#define TCG_TARGET_CALL_STACK_OFFSET 48
+/* optional instructions automatically implemented */
+#define TCG_TARGET_HAS_ext8u_i32 0 /* andi */
+#define TCG_TARGET_HAS_ext16u_i32 0
+
/* optional instructions */
#define TCG_TARGET_HAS_div_i32 1
#define TCG_TARGET_HAS_rot_i32 0
#define TCG_TARGET_HAS_ext8s_i32 1
#define TCG_TARGET_HAS_ext16s_i32 1
-#define TCG_TARGET_HAS_ext8u_i32 0
-#define TCG_TARGET_HAS_ext16u_i32 0
#define TCG_TARGET_HAS_bswap16_i32 0
#define TCG_TARGET_HAS_bswap32_i32 0
#define TCG_TARGET_HAS_not_i32 1
--
1.8.1.4
- [Qemu-devel] [PATCH v5 04/33] tcg-ppc64: Introduce and use tcg_out_ext32u, (continued)
- [Qemu-devel] [PATCH v5 04/33] tcg-ppc64: Introduce and use tcg_out_ext32u, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 05/33] tcg-ppc64: Introduce and use tcg_out_shli64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 06/33] tcg-ppc64: Introduce and use tcg_out_shri64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 07/33] tcg-ppc64: Introduce and use TAI and SAI, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 08/33] tcg-ppc64: Fix setcond_i32, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 09/33] tcg-ppc64: Cleanup tcg_out_movi, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 10/33] tcg-ppc64: Rearrange integer constant constraints, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 11/33] tcg-ppc64: Improve constant add and sub ops., Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 12/33] tcg-ppc64: Allow constant first argument to sub, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 13/33] tcg-ppc64: Tidy or and xor patterns., Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 14/33] tcg-ppc64: Improve and_i32 with constant,
Richard Henderson <=
- [Qemu-devel] [PATCH v5 15/33] tcg-ppc64: Improve and_i64 with constant, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 17/33] tcg-ppc64: Streamline qemu_ld/st insn selection, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 18/33] tcg-ppc64: Implement rotates, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 19/33] tcg-ppc64: Implement bswap16 and bswap32, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 20/33] tcg-ppc64: Implement bswap64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 22/33] tcg-ppc64: Handle constant inputs for some compound logicals, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 23/33] tcg-ppc64: Implement deposit, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 24/33] tcg-ppc64: Use I constraint for mul, Richard Henderson, 2013/04/15