Re: [Qemu-devel] [PATCH arm-devs v1 10/15] xilinx_spips: Fix CTRL register RW bits

[Peter Maydell]

On 3 April 2013 05:33, Peter Crosthwaite <address@hidden> wrote:
> The CTRL register was RAZ/WI on some of the RW bits. Even though the
> function behind these bits is invalid in QEMU, they should still be
> guest accessible. Fix.
>
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
>
>  hw/xilinx_spips.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c
> index 16c2e1d..a2019e4 100644
> --- a/hw/xilinx_spips.c
> +++ b/hw/xilinx_spips.c
> @@ -341,7 +341,7 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr 
> addr,
>      addr >>= 2;
>      switch (addr) {
>      case R_CONFIG:
> -        mask = 0x0002FFFF;
> +        mask = 0x840AFFFF;
>          break;
>      case R_INTR_STATUS:
>          ret = s->regs[addr] & IXR_ALL;
> @@ -404,7 +404,7 @@ static void xilinx_spips_write(void *opaque, hwaddr addr,
>      addr >>= 2;
>      switch (addr) {
>      case R_CONFIG:
> -        mask = 0x0002FFFF;
> +        mask = 0x840AFFFF;
>          if (value & MAN_START_COM) {
>              man_start_com = 1;
>          }
> --
> 1.7.0.4
>


Maybe the magic number for 'implemented bits in the register'
deserves a #define ?

-- PMM