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Re: [Qemu-devel] [PATCH v2 27/27] tcg-ppc64: Implement mulu2/muls2_i64
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH v2 27/27] tcg-ppc64: Implement mulu2/muls2_i64 |
Date: |
Mon, 1 Apr 2013 17:00:20 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Mon, Mar 04, 2013 at 04:33:10PM -0800, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> tcg/ppc64/tcg-target.c | 27 +++++++++++++++++++++++++++
> tcg/ppc64/tcg-target.h | 4 ++--
> 2 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index 7f3e76d..334b030 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -2013,6 +2013,31 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
> const TCGArg *args,
> }
> break;
>
> + case INDEX_op_mulu2_i64:
> + case INDEX_op_muls2_i64:
> + {
> + int oph = (opc == INDEX_op_mulu2_i64 ? MULHDU : MULHD);
> + TCGReg outl = args[0], outh = args[1];
> + a0 = args[2], a1 = args[3];
> +
> + if (outl == a0 || outl == a1) {
> + if (outh == a0 || outh == a1) {
> + outl = TCG_REG_R0;
> + } else {
> + tcg_out32(s, oph | TAB(outh, a0, a1));
> + oph = 0;
> + }
> + }
> + tcg_out32(s, MULLD | TAB(outl, a0, a1));
> + if (oph != 0) {
> + tcg_out32(s, oph | TAB(outh, a0, a1));
> + }
> + if (outl != args[0]) {
> + tcg_out_mov(s, TCG_TYPE_I64, args[0], outl);
> + }
> + }
> + break;
> +
> default:
> tcg_dump_ops (s);
> tcg_abort ();
> @@ -2142,6 +2167,8 @@ static const TCGTargetOpDef ppc_op_defs[] = {
>
> { INDEX_op_add2_i64, { "r", "r", "r", "rI", "r", "rZM" } },
> { INDEX_op_sub2_i64, { "r", "r", "rI", "r", "rZM", "r" } },
> + { INDEX_op_muls2_i64, { "r", "r", "r", "r" } },
> + { INDEX_op_mulu2_i64, { "r", "r", "r", "r" } },
>
> { -1 },
> };
> diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
> index b8cc97c..d4b0763 100644
> --- a/tcg/ppc64/tcg-target.h
> +++ b/tcg/ppc64/tcg-target.h
> @@ -114,8 +114,8 @@ typedef enum {
> #define TCG_TARGET_HAS_movcond_i64 1
> #define TCG_TARGET_HAS_add2_i64 1
> #define TCG_TARGET_HAS_sub2_i64 1
> -#define TCG_TARGET_HAS_mulu2_i64 0
> -#define TCG_TARGET_HAS_muls2_i64 0
> +#define TCG_TARGET_HAS_mulu2_i64 1
> +#define TCG_TARGET_HAS_muls2_i64 1
>
> #define TCG_AREG0 TCG_REG_R27
>
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
address@hidden http://www.aurel32.net
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