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[Qemu-devel] [PATCH 20/48] mmu-hash*: Remove eaddr field from mmu_ctx_ha
From: |
David Gibson |
Subject: |
[Qemu-devel] [PATCH 20/48] mmu-hash*: Remove eaddr field from mmu_ctx_hash{32, 64} |
Date: |
Tue, 12 Mar 2013 21:31:22 +1100 |
The eaddr field of mmu_ctx_hash{32,64} is effectively just used to pass the
effective address from get_segment{32,64}() to find_pte{32,64}(). Just
pass it as a normal parameter instead.
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu-hash32.c | 12 +++++-------
target-ppc/mmu-hash64.c | 12 +++++-------
2 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index ad5ef44..8001563 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -43,7 +43,6 @@
struct mmu_ctx_hash32 {
hwaddr raddr; /* Real address */
- hwaddr eaddr; /* Effective address */
int prot; /* Protection bits */
hwaddr hash[2]; /* Pagetable hash values */
target_ulong ptem; /* Virtual segment ID | API */
@@ -314,8 +313,8 @@ hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash)
}
/* PTE table lookup */
-static int find_pte32(CPUPPCState *env, struct mmu_ctx_hash32 *ctx, int h,
- int rwx, int target_page_bits)
+static int find_pte32(CPUPPCState *env, struct mmu_ctx_hash32 *ctx,
+ target_ulong eaddr, int h, int rwx, int target_page_bits)
{
hwaddr pteg_off;
target_ulong pte0, pte1;
@@ -371,7 +370,7 @@ static int find_pte32(CPUPPCState *env, struct
mmu_ctx_hash32 *ctx, int h,
/* We have a TLB that saves 4K pages, so let's
* split a huge page to 4k chunks */
if (target_page_bits != TARGET_PAGE_BITS) {
- ctx->raddr |= (ctx->eaddr & ((1 << target_page_bits) - 1))
+ ctx->raddr |= (eaddr & ((1 << target_page_bits) - 1))
& TARGET_PAGE_MASK;
}
return ret;
@@ -387,7 +386,6 @@ static int get_segment32(CPUPPCState *env, struct
mmu_ctx_hash32 *ctx,
target_ulong sr, pgidx;
pr = msr_pr;
- ctx->eaddr = eaddr;
sr = env->sr[eaddr >> 28];
ctx->key = (((sr & SR32_KP) && (pr != 0)) ||
@@ -426,14 +424,14 @@ static int get_segment32(CPUPPCState *env, struct
mmu_ctx_hash32 *ctx,
env->htab_base, env->htab_mask, vsid, ctx->ptem,
ctx->hash[0]);
/* Primary table lookup */
- ret = find_pte32(env, ctx, 0, rwx, target_page_bits);
+ ret = find_pte32(env, ctx, eaddr, 0, rwx, target_page_bits);
if (ret < 0) {
/* Secondary table lookup */
LOG_MMU("1 htab=" TARGET_FMT_plx "/" TARGET_FMT_plx
" vsid=" TARGET_FMT_lx " api=" TARGET_FMT_lx
" hash=" TARGET_FMT_plx "\n", env->htab_base,
env->htab_mask, vsid, ctx->ptem, ctx->hash[1]);
- ret2 = find_pte32(env, ctx, 1, rwx, target_page_bits);
+ ret2 = find_pte32(env, ctx, eaddr, 1, rwx, target_page_bits);
if (ret2 != -1) {
ret = ret2;
}
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index f89d005..407c6e6 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -42,7 +42,6 @@
struct mmu_ctx_hash64 {
hwaddr raddr; /* Real address */
- hwaddr eaddr; /* Effective address */
int prot; /* Protection bits */
hwaddr hash[2]; /* Pagetable hash values */
target_ulong ptem; /* Virtual segment ID | API */
@@ -372,8 +371,8 @@ static int ppc_hash64_pte_update_flags(struct
mmu_ctx_hash64 *ctx,
}
/* PTE table lookup */
-static int find_pte64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, int h,
- int rwx, int target_page_bits)
+static int find_pte64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
+ target_ulong eaddr, int h, int rwx, int target_page_bits)
{
hwaddr pteg_off;
target_ulong pte0, pte1;
@@ -429,7 +428,7 @@ static int find_pte64(CPUPPCState *env, struct
mmu_ctx_hash64 *ctx, int h,
/* We have a TLB that saves 4K pages, so let's
* split a huge page to 4k chunks */
if (target_page_bits != TARGET_PAGE_BITS) {
- ctx->raddr |= (ctx->eaddr & ((1 << target_page_bits) - 1))
+ ctx->raddr |= (eaddr & ((1 << target_page_bits) - 1))
& TARGET_PAGE_MASK;
}
return ret;
@@ -444,7 +443,6 @@ static int get_segment64(CPUPPCState *env, struct
mmu_ctx_hash64 *ctx,
int ret, ret2;
pr = msr_pr;
- ctx->eaddr = eaddr;
ppc_slb_t *slb;
target_ulong pageaddr;
int segment_bits;
@@ -500,14 +498,14 @@ static int get_segment64(CPUPPCState *env, struct
mmu_ctx_hash64 *ctx,
env->htab_base, env->htab_mask, vsid, ctx->ptem,
ctx->hash[0]);
/* Primary table lookup */
- ret = find_pte64(env, ctx, 0, rwx, target_page_bits);
+ ret = find_pte64(env, ctx, eaddr, 0, rwx, target_page_bits);
if (ret < 0) {
/* Secondary table lookup */
LOG_MMU("1 htab=" TARGET_FMT_plx "/" TARGET_FMT_plx
" vsid=" TARGET_FMT_lx " api=" TARGET_FMT_lx
" hash=" TARGET_FMT_plx "\n", env->htab_base,
env->htab_mask, vsid, ctx->ptem, ctx->hash[1]);
- ret2 = find_pte64(env, ctx, 1, rwx, target_page_bits);
+ ret2 = find_pte64(env, ctx, eaddr, 1, rwx, target_page_bits);
if (ret2 != -1) {
ret = ret2;
}
--
1.7.10.4
- [Qemu-devel] [PATCH 21/48] mmu-hash*: Combine ppc_hash{32, 64}_get_physical_address and get_segment{32, 64}(), (continued)
- [Qemu-devel] [PATCH 21/48] mmu-hash*: Combine ppc_hash{32, 64}_get_physical_address and get_segment{32, 64}(), David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 35/48] mmu-hash32: Don't look up page tables on BAT permission error, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 37/48] mmu-hash32: Remove nx from context structure, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 26/48] mmu-hash*: Separate PTEG searching from permissions checking, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 24/48] mmu-hash*: Cleanup segment-level NX check, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 25/48] mmu-hash*: Don't keep looking for PTEs after we find a match, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 39/48] mmu-hash64: Factor SLB N bit into permissions bits, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 27/48] mmu-hash*: Make find_pte{32, 64} do more of the job of finding ptes, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 34/48] mmu-hash32: Cleanup BAT lookup, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 18/48] mmu-hash*: Reduce use of access_type, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 20/48] mmu-hash*: Remove eaddr field from mmu_ctx_hash{32, 64},
David Gibson <=
- [Qemu-devel] [PATCH 33/48] mmu-hash32: Clean up BAT matching logic, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 42/48] mmu-hash*: Correctly mask RPN from hash PTE, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 32/48] mmu-hash32: Split BAT size logic from permissions logic, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 23/48] mmu-hash32: Split direct store segment handling into a helper, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 36/48] mmu-hash*: Don't update PTE flags when permission is denied, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 30/48] mmu-hash*: Fold pte_check*() logic into caller, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 38/48] mmu-hash*: Clean up permission checking, David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 28/48] mmu-hash*: Remove permission checking from find_pte{32, 64}(), David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 29/48] mmu-hash64: Clean up ppc_hash64_htab_lookup(), David Gibson, 2013/03/12
- [Qemu-devel] [PATCH 41/48] mmu-hash*: Clean up real address calculation, David Gibson, 2013/03/12