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[Qemu-devel] [PATCH 52/57] target-i386: Implement SHLX, SARX, SHRX
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 52/57] target-i386: Implement SHLX, SARX, SHRX |
Date: |
Tue, 19 Feb 2013 09:40:26 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 51016fe..c1a2886 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -4174,6 +4174,37 @@ static void gen_sse(CPUX86State *env, DisasContext *s,
int b,
gen_helper_pext(cpu_regs[reg], cpu_T[0], cpu_T[1]);
break;
+ case 0x1f7: /* shlx Gy, Ey, By */
+ case 0x2f7: /* sarx Gy, Ey, By */
+ case 0x3f7: /* shrx Gy, Ey, By */
+ if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI2)
+ || !(s->prefix & PREFIX_VEX)
+ || s->vex_l != 0) {
+ goto illegal_op;
+ }
+ ot = (s->dflag == 2 ? OT_QUAD : OT_LONG);
+ gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
+ if (ot == OT_QUAD) {
+ tcg_gen_andi_tl(cpu_T[1], cpu_regs[s->vex_v], 63);
+ } else {
+ tcg_gen_andi_tl(cpu_T[1], cpu_regs[s->vex_v], 31);
+ }
+ if (b == 0x1f7) {
+ tcg_gen_shl_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
+ } else if (b == 0x2f7) {
+ if (ot != OT_QUAD) {
+ tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
+ }
+ tcg_gen_sar_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
+ } else {
+ if (ot != OT_QUAD) {
+ tcg_gen_ext32u_tl(cpu_T[0], cpu_T[0]);
+ }
+ tcg_gen_shr_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
+ }
+ gen_op_mov_reg_T0(ot, reg);
+ break;
+
case 0x0f3:
case 0x1f3:
case 0x2f3:
--
1.8.1.2
- [Qemu-devel] [PATCH 04/57] target-i386: introduce gen_ext_tl, (continued)
- [Qemu-devel] [PATCH 04/57] target-i386: introduce gen_ext_tl, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 16/57] target-i386: Use gen_update_cc_op everywhere, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 17/57] target-i386: add helper functions to get other flags, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 23/57] target-i386: convert gen_compute_eflags_c to TCG, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 18/57] target-i386: do not compute eflags multiple times consecutively, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 25/57] target-i386: optimize setbe, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 24/57] target-i386: change gen_setcc_slow_T0 to gen_setcc_slow, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 26/57] target-i386: optimize setle, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 22/57] target-i386: use inverted setcond when computing NS or NZ, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 56/57] target-i386: Implement tzcnt and fix lzcnt, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 52/57] target-i386: Implement SHLX, SARX, SHRX,
Richard Henderson <=
- [Qemu-devel] [PATCH 31/57] target-i386: inline gen_prepare_cc_slow, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 36/57] target-i386: use gen_op for cmps/scas, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 41/57] target-i386: Make helper_cc_compute_{all, c} const, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 49/57] target-i386: Implement BZHI, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 37/57] target-i386: introduce gen_jcc1_noeob, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 33/57] target-i386: introduce gen_cmovcc1, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 39/57] target-i386: optimize flags checking after sub using CC_SRCT, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 42/57] target-i386: Use CC_SRC2 for ADC and SBB, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 28/57] target-i386: introduce CCPrepare, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 30/57] target-i386: use CCPrepare to generate conditional jumps, Richard Henderson, 2013/02/19