Re: [Qemu-devel] [edk2] (PAM stuff) reset doesn't work on OVMF + SeaBIOS CSM

[Laszlo Ersek]

On 02/18/13 17:48, David Woodhouse wrote:
> On Mon, 2013-02-18 at 16:38 +0100, Paolo Bonzini wrote:
>> Indeed the difference between CPUs is puzzling.
> 
> Very much so. So far I have established that it works OK here:
> 
> cpu family    : 6
> model         : 44
> model name    : Intel(R) Core(TM) i7 CPU       X 980  @ 3.33GHz
> stepping      : 2
> microcode     : 0x5
> flags         : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
> pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
> pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl
> xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx
> est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 popcnt aes lahf_lm arat
> dtherm tpr_shadow vnmi flexpriority ept vpid

> ... but not here:
> 
> cpu family    : 6
> model         : 30
> model name    : Intel(R) Core(TM) i7 CPU         870  @ 2.93GHz
> stepping      : 5
> microcode     : 0x5
> flags         : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
> pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
> rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
> nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3
> cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm ida dtherm tpr_shadow vnmi
> flexpriority ept vpid

Maybe related to <https://patchwork.kernel.org/patch/26836/>?

Anyway, the X980 seems to have these in addition to the shared flags:

#define X86_FEATURE_AES         (4*32+25) /* AES instructions */
#define X86_FEATURE_ARAT        (7*32+ 1) /* Always Running APIC Timer */
#define X86_FEATURE_PCID        (4*32+17) /* Process Context Identifiers */
#define X86_FEATURE_PCLMULQDQ   (4*32+ 1) /* PCLMULQDQ instruction */
#define X86_FEATURE_GBPAGES     (1*32+26) /* "pdpe1gb" GB pages */

Unique to the 870 is:

#define X86_FEATURE_IDA         (7*32+ 0) /* Intel Dynamic Acceleration */
#define X86_FEATURE_SMX         (4*32+ 6) /* Safer mode */

Laszlo