[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 38/57] target-i386: Update cc_op before TCG branches
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 38/57] target-i386: Update cc_op before TCG branches |
Date: |
Wed, 23 Jan 2013 20:03:22 -0800 |
Placing the CC_OP_DYNAMIC at the join is less effective than
before the branch, as the branch will have forced global registers
to their home locations. This way we have a chance to discard
CC_SRC2 before it gets stored.
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 9f031a8..b3ba93e 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1552,8 +1552,9 @@ static void gen_shift_rm_T1(DisasContext *s, int ot, int
op1,
gen_op_mov_reg_T0(ot, op1);
}
- /* update eflags */
+ /* Update eflags data because we cannot predict flags afterward. */
gen_update_cc_op(s);
+ set_cc_op(s, CC_OP_DYNAMIC);
tcg_gen_mov_tl(t1, cpu_T[0]);
@@ -1580,7 +1581,6 @@ static void gen_shift_rm_T1(DisasContext *s, int ot, int
op1,
}
gen_set_label(shift_label);
- set_cc_op(s, CC_OP_DYNAMIC); /* cannot predict flags after */
tcg_temp_free(t0);
tcg_temp_free(t1);
@@ -1965,8 +1965,9 @@ static void gen_shiftd_rm_T1(DisasContext *s, int ot, int
op1,
gen_op_mov_reg_v(ot, op1, t0);
}
- /* update eflags */
+ /* Update eflags data because we cannot predict flags afterward. */
gen_update_cc_op(s);
+ set_cc_op(s, CC_OP_DYNAMIC);
label2 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label2);
@@ -1979,7 +1980,6 @@ static void gen_shiftd_rm_T1(DisasContext *s, int ot, int
op1,
tcg_gen_movi_i32(cpu_cc_op, CC_OP_SHLB + ot);
}
gen_set_label(label2);
- set_cc_op(s, CC_OP_DYNAMIC); /* cannot predict flags after */
tcg_temp_free(t0);
tcg_temp_free(t1);
--
1.7.11.7
- [Qemu-devel] [PATCH 33/57] target-i386: introduce gen_cmovcc1, (continued)
- [Qemu-devel] [PATCH 33/57] target-i386: introduce gen_cmovcc1, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 31/57] target-i386: inline gen_prepare_cc_slow, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 40/57] target-i386: Use CC_SRC2 for ADC and SBB, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 35/57] target-i386: kill cpu_T3, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 49/57] target-i386: Implement BZHI, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 39/57] target-i386: optimize flags checking after sub using CC_SRC2, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 36/57] target-i386: use gen_op for cmps/scas, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 48/57] target-i386: Implement BLSR, BLSMSK, BLSI, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 46/57] target-i386: Implement ANDN, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 51/57] target-i386: Implement PDEP, PEXT, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 38/57] target-i386: Update cc_op before TCG branches,
Richard Henderson <=
- [Qemu-devel] [PATCH 50/57] target-i386: Implement MULX, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 45/57] target-i386: Implement MOVBE, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 32/57] target-i386: cleanup temporary macros for CCPrepare, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 34/57] target-i386: expand cmov via movcond, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 37/57] target-i386: introduce gen_jcc1_noeob, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 52/57] target-i386: Implement SHLX, SARX, SHRX, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 20/57] target-i386: Move CC discards to set_cc_op, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 21/57] target-i386: do not call helper to compute ZF/SF, Richard Henderson, 2013/01/23
- [Qemu-devel] [PATCH 26/57] target-i386: optimize setle, Richard Henderson, 2013/01/24
- [Qemu-devel] [PATCH 22/57] target-i386: use inverted setcond when computing NS or NZ, Richard Henderson, 2013/01/24