[Qemu-devel] [RFC qom-cpu 10/15] target-mips: Introduce QOM realizefn for MIPSCPU

[Andreas Färber]

Introduce a realizefn and set realized = true from cpu_mips_init().

Signed-off-by: Andreas Färber <address@hidden>
---
 target-mips/cpu.c       |   11 +++++++++++
 target-mips/translate.c |    5 +++--
 2 Dateien geändert, 14 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 10ff46d..bb782e1 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -42,6 +42,14 @@ static void mips_cpu_reset(CPUState *s)
     cpu_state_reset(env);
 }
 
+static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    MIPSCPU *cpu = MIPS_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void mips_cpu_initfn(Object *obj)
 {
     MIPSCPU *cpu = MIPS_CPU(obj);
@@ -54,6 +62,9 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
 {
     MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
     CPUClass *cc = CPU_CLASS(c);
+    DeviceClass *dc = DEVICE_CLASS(c);
+
+    dc->realize = mips_cpu_realizefn;
 
     mcc->parent_reset = cc->reset;
     cc->reset = mips_cpu_reset;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 206ba83..9ea9354 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15871,8 +15871,9 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
     fpu_init(env, def);
     mvp_init(env, def);
     mips_tcg_init();
-    cpu_reset(CPU(cpu));
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4