Re: [Qemu-devel] [PATCH RFT 4/5] exynos4210: Add EHCI support

[Igor Mitsyanko]

On 12/02/2012 06:57 AM, Andreas Färber wrote:
> From: Liming Wang <address@hidden>
>
> Add EHCI USB host controller to exynos4210.
>
> Signed-off-by: Liming Wang <address@hidden>
> [AF: Use type constant]
> Signed-off-by: Andreas Färber <address@hidden>
> ---
>   hw/exynos4210.c     |    7 +++++++
>   hw/exynos4210_gic.c |    2 +-
>   2 Dateien geändert, 8 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
>
> diff --git a/hw/exynos4210.c b/hw/exynos4210.c
> index 00d4db8..35d4936 100644
> --- a/hw/exynos4210.c
> +++ b/hw/exynos4210.c
> @@ -27,6 +27,7 @@
>   #include "arm-misc.h"
>   #include "loader.h"
>   #include "exynos4210.h"
> +#include "usb/hcd-ehci.h"
>
>   #define EXYNOS4210_CHIPID_ADDR         0x10000000
>
> @@ -72,6 +73,9 @@
>   /* Display controllers (FIMD) */
>   #define EXYNOS4210_FIMD0_BASE_ADDR          0x11C00000
>
> +/* EHCI */
> +#define EXYNOS4210_EHCI_BASE_ADDR           0x12580000
> +
>   static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
>                                       0x09, 0x00, 0x00, 0x00 };
>
> @@ -334,5 +338,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
>               s->irq_table[exynos4210_get_irq(11, 2)],
>               NULL);
>
> +    sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR,
> +            s->irq_table[exynos4210_get_irq(28, 3)]);
> +
>       return s;
>   }
> diff --git a/hw/exynos4210_gic.c b/hw/exynos4210_gic.c
> index 4fea098..959de56 100644
> --- a/hw/exynos4210_gic.c
> +++ b/hw/exynos4210_gic.c
> @@ -140,7 +140,7 @@ 
> combiner_grp_to_gic_id[64-EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ][8] = {
>               EXT_GIC_ID_I2C4, EXT_GIC_ID_I2C5, EXT_GIC_ID_I2C6,
>               EXT_GIC_ID_I2C7 },
>       /* int combiner group 28 */
> -    { EXT_GIC_ID_SPI0, EXT_GIC_ID_SPI1, EXT_GIC_ID_SPI2 },
> +    { EXT_GIC_ID_SPI0, EXT_GIC_ID_SPI1, EXT_GIC_ID_SPI2 , EXT_GIC_ID_USB_HOST},
>       /* int combiner group 29 */
>       { EXT_GIC_ID_HSMMC0, EXT_GIC_ID_HSMMC1, EXT_GIC_ID_HSMMC2,
>        EXT_GIC_ID_HSMMC3, EXT_GIC_ID_SDMMC },


Reviewed-by: Igor Mitsyanko <address@hidden>

--
Mitsyanko Igor
ASWG, Moscow R&D center, Samsung Electronics
email: address@hidden